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GATE EC · EE · IN

Sinusoidal steady state, AC power and resonance

Sinusoidal steady-state analysis replaces the differential equations of an RLC circuit with complex algebra: every source and response becomes a phasor and every element an impedance, so nodal, mesh and the network theorems apply unchanged. On that base sit rms values, the AC power quantities (active, reactive, apparent and complex power, power factor and its correction), maximum power transfer with complex impedances, series and parallel resonance with and bandwidth, locus diagrams, and simple RLC filters. Most problems here reduce to a few lines of phasor arithmetic once the right convention (rms phasors, passive sign convention, ) and the right formula are chosen.

34 previous-year questions · 34 solved · 6 practice questions

Periodic waveforms: average, rms, form and crest factor

For a periodic signal of period , the average (dc) value is the mean over one period and the rms (effective) value is the square root of the mean of the square. The rms value is the dc value that would dissipate the same average power in a resistor, which is why meter readings, nameplate ratings and every AC power formula use rms. For waveforms whose full-cycle average is zero (sine, symmetric square, symmetric triangle), the average used in the form factor is the half-cycle average.

AVERAGE VALUE

Any periodic waveform; integrate over any one full period.

RMS VALUE

Any periodic waveform. Square first, then average, then take the root.

SINUSOID

. The full-cycle average is zero; the rms value does not depend on the phase .

FORM FACTOR AND CREST (PEAK) FACTOR

is the half-cycle average for a waveform whose full-cycle average is zero; is the largest absolute value. For a sine, and .

Waveform (peak )

Average

RMS

Form factor

Crest factor

Sine

(full cycle); (half cycle)

Full-wave rectified sine

Half-wave rectified sine

Symmetric square,

(full); (half)

Symmetric triangle,

(full); (half)

Sawtooth, to

Rectangular pulse train: for a fraction of each period, otherwise ()

RMS OF A SUM OF DIFFERENT FREQUENCIES

Only when the components have different frequencies (dc counts as frequency zero): products of different frequencies average to zero over the common period. Add same-frequency terms as phasors first.

EXAM TIP

Trap: is ONE sinusoid of amplitude , so its rms value is , not . Squares of rms values add only for different frequencies, or for same-frequency terms exactly apart (such as and ).

WORKED EXAMPLE

Find the rms value of A.

Solution
  1. The two terms have the same frequency, so add them as peak phasors: . Their rms value is A, whose square is .

  2. The term has rms value A, square . The dc term contributes .

  3. Different frequencies add in squares: .

Answer: A

Phasors, impedance and admittance

In a linear, time-invariant circuit driven by sinusoids of one frequency , once the transient (natural) response has died out, every voltage and current is a sinusoid of that same frequency; only amplitude and phase differ. A phasor stores those two numbers as one complex number. Convention in these notes: phasors are rms and referred to cosine, so . Convert a sine with , or take sine as the reference for every source in the problem; mixing references is the error, not the choice. If a problem uses peak phasors, every power expression below that is written in phasor magnitudes (such as , , and ) gains a factor .

Because becomes multiplication by , each element obeys with a complex impedance, and KCL, KVL, nodal and mesh analysis, source transformation, superposition, Thevenin and Norton all carry over unchanged with complex arithmetic.

ELEMENT IMPEDANCES

Inductor: voltage leads current by . Capacitor: current leads voltage by . Resistor: in phase.

IMPEDANCE

: inductive, current lags. : capacitive, current leads. is the angle by which voltage leads current. The arctangent form assumes (a passive impedance); for , or with the sign of .

ADMITTANCE

only when . Susceptances: capacitor , inductor .

COMBINATIONS AND DIVIDERS

Same as dc, with complex numbers: the voltage divider is for elements in series, the current divider for two parallel branches. Magnitudes add only when the phasors are in phase.

Phasor-domain analysis, in order

  1. Check that every source has the same . Choose one reference (cos or sin) and one scale (rms or peak), and write each source as a phasor.

  2. Replace R, L, C by , , ; a mutual inductance by , signed by the dot convention (a current entering the dotted terminal of one coil induces a voltage in the other coil that is positive at that coil's dotted terminal).

  3. Solve with nodal or mesh analysis, Thevenin/Norton, source transformation or superposition, in complex algebra.

  4. Convert back: the rms phasor gives .

  5. If the sources have different frequencies, solve one circuit per frequency (the impedances change with ) and add the responses in the time domain. Never add phasors of different frequencies.

A phasor diagram draws these complex numbers to scale. Take the quantity common to all elements as the reference: current in a series circuit, voltage in a parallel one. In series RLC the drops (in phase with ), ( ahead of ) and ( behind ) add as vectors, , so a single element voltage can exceed the supply voltage.

EXAM TIP

Meter readings are magnitudes. In a series RL circuit with V and V, the supply is V, not V. KVL holds for phasors, not for voltmeter readings.

AC power: active, reactive, apparent and complex

Convention: passive sign convention (current enters the terminal of the element), so a positive result is power absorbed; phasors are rms. For a load with and , the power-factor angle is , which equals the angle of the load impedance.

INSTANTANEOUS POWER

With and : a constant plus a term at whose average is zero.

ACTIVE, REACTIVE AND APPARENT POWER

rms values. is the average of . is the amplitude of the part of that flows back and forth between the source and the fields of L and C, with zero average.

COMPLEX POWER

rms phasors, power absorbed by the load. With peak phasors, . The conjugate goes on the current; writing instead flips the sign of .

POWER IN EACH ELEMENT

and are positive magnitudes. An inductor absorbs reactive power, a capacitor delivers it, and neither absorbs average power.

POWER FACTOR

Lagging when current lags voltage (, , inductive); leading when current leads (, , capacitive); unity at . Always state lagging or leading with the number.

CONSERVATION OF COMPLEX POWER

Every element taken with the passive sign convention. and of loads add whether they are in series or parallel; apparent powers do NOT add in general (only when every load has the same power-factor angle).

Power-factor correction. A lagging load draws more current than its real power needs, which raises line loss and the kVA rating the supply must provide. A capacitor connected in parallel (so the load voltage is unchanged) supplies part of the load's reactive power: is unchanged, the reactive power drawn from the supply falls, and so does the supply current.

SHUNT CAPACITOR FOR PF CORRECTION

, = pf angles before and after (lagging taken positive), = rms voltage across the capacitor, in W. For a final leading pf take negative.

WORKED EXAMPLE

A single-phase load takes 10 kW at 0.8 pf lagging from a 230 V (rms), 50 Hz supply. Find the shunt capacitance that raises the supply pf to 0.95 lagging, and the supply current before and after.

Solution
  1. , so var.

  2. , so var.

  3. The capacitor must supply var.

  4. .

  5. Supply current before: A. After: A. is the same 10 kW in both cases.

Answer: ; the supply current falls from 54.3 A to 45.8 A.

Non-sinusoidal periodic waveforms. Expand and into dc plus harmonics. The product of two sinusoids of different frequencies averages to zero over the common period, so average power comes only from voltage and current terms of the same frequency.

AVERAGE POWER WITH HARMONICS

, = rms values of the -th harmonic; = angle by which leads . A harmonic present in only one of , contributes nothing. Power factor using the full rms values. If is a pure sinusoid and only is distorted, this becomes : distortion factor times displacement factor.

WORKED EXAMPLE

A two-terminal network (passive sign convention) has V and A. Find the average power and the power factor.

Solution
  1. dc: W.

  2. Fundamental: rms values V and A, voltage leading current by : W.

  3. The 3rd harmonic is only in and the 5th only in , so neither contributes. W.

  4. V; A.

  5. .

Answer: W; pf

EXAM TIP

Quick checks: a pure L or C absorbs . For loads in parallel, add the 's and the 's separately and only then take . A capacitor rated at voltage and frequency delivers at voltage and frequency , because its reactive power is .

Maximum power transfer in AC

Replace the network seen by the load with its Thevenin equivalent: (rms) in series with . is the open-circuit voltage at the load terminals; , or the ratio at the terminals when a test source is applied with every independent source set to zero (the test-source method is needed when dependent sources are present). For a load the load current is , and what maximises the load power depends on which parts of are allowed to vary.

LOAD POWER

rms. Start every restricted-load problem from this expression.

What the load may vary

Condition for maximum

Maximum load power

and both free

: ,

Purely resistive load ()

Substitute into

free, fixed

Substitute into

free, fixed

Angle of fixed, free

Substitute into

CONJUGATE MATCH

rms (with a peak value it is ). The Thevenin source then delivers twice this power, so the efficiency measured against the Thevenin equivalent is 50%.

PURELY RESISTIVE LOAD

When the load cannot have reactance. Gives less power than the conjugate match unless .

WORKED EXAMPLE

A network has V (rms) and at the operating frequency. Find the maximum load power (a) for an arbitrary load impedance and (b) for a purely resistive load.

Solution
  1. (a) Conjugate match, : W.

  2. (b) . Current A.

  3. W.

Answer: (a) 208.3 W with ; (b) 156.25 W with

EXAM TIP

With a purely resistive load, do not set when ; the optimum is . And a conjugate match holds at one frequency only, because the load reactance must cancel at that .

EXAM TIP

Two more traps. (1) If the load is fixed and the source resistance is what can be adjusted, is largest at the smallest possible (zero if allowed), not at : every matching condition above assumes a fixed source and an adjustable load. (2) An ideal transformer of turns ratio , with the network on the side, presents the load to the network as . It scales but not its angle, so it is the 'angle fixed, free' case: for a resistive load choose , which is when is resistive.

Resonance: series, parallel and the practical tank

A circuit containing both L and C is resonant at the frequency where its input impedance (equivalently admittance) is purely real, so the source voltage and current are in phase (unity pf). The net reactive power absorbed, with and the time-averaged energies stored in the inductors and in the capacitors, is then zero: the reactive powers of L and C cancel, and energy swaps between L and C instead of between the circuit and the source. In this section denotes the quality factor, not reactive power.

RESONANT FREQUENCY

Ideal series RLC and ideal parallel RLC (frequency-independent R). The value of R does not shift it.

Series RLC, : at , is minimum and the current is maximum. Below the circuit is capacitive (current leads); above it is inductive (current lags).

QUALITY FACTOR, SERIES RLC

is the total series resistance, including the coil's own resistance and the source's internal resistance.

QUALITY FACTOR, GENERAL DEFINITION

Evaluated at resonance, counting the total energy stored in L and C; it reduces to the series and parallel formulas.

VOLTAGE MAGNIFICATION (SERIES)

The L and C voltages are apart and cancel, but each is times the supply voltage.

HALF-POWER FREQUENCIES (SERIES)

Constant-amplitude voltage source. At and : , , , impedance angle at (capacitive) and at (inductive). is their exact geometric mean.

BANDWIDTH (SERIES)

Exact for any . For high (roughly ), ; the arithmetic symmetry about is only approximate, the geometric one is exact.

FREQUENCIES OF PEAK CAPACITOR AND INDUCTOR VOLTAGE (SERIES)

Constant-amplitude source, . peaks slightly below and slightly above, both at the same height , a little above . The current and peak exactly at .

WORKED EXAMPLE

A series RLC circuit has , H, and is fed from a 50 V (rms) variable-frequency source. Find , , the bandwidth, the half-power frequencies, and the current and capacitor voltage at resonance.

Solution
  1. rad/s ( Hz).

  2. ; rad/s, which equals .

  3. , so rad/s and rad/s. Check: .

  4. At resonance A and W.

  5. V. Check: V.

Answer: rad/s, , BW rad/s, rad/s, rad/s, A, V

Parallel RLC (ideal R, L and C in parallel, ) is the dual: at the admittance is minimum, the impedance is maximum and equal to , and the current drawn from a voltage source is minimum (); fed from a current source, the voltage is maximum. Below the circuit is inductive and above it capacitive, the opposite of series.

QUALITY FACTOR AND BANDWIDTH, PARALLEL RLC

Ideal parallel RLC. Current magnification: at , . A current source with internal resistance puts in parallel with : use in and BW.

HALF-POWER FREQUENCIES (PARALLEL)

Ideal parallel RLC driven by a constant-amplitude current source, so there; again .

SERIES-PARALLEL EQUIVALENT AT ONE FREQUENCY

A series and a parallel combination of and have the same impedance at the frequency where the values are computed, and only there. For , and , which is where the tank result below comes from.

Practical tank circuit. A real coil has series resistance, so the usual tank is a coil ( in series with ) in parallel with . Setting the imaginary part of to zero gives the unity-pf frequency and the purely resistive impedance there.

PRACTICAL TANK (COIL R, L IN PARALLEL WITH C)

= frequency of unity pf; = dynamic impedance (purely resistive) at that frequency. A real exists only if . Exactly, with the coil taken at this ; for , and .

Property

Series RLC

Parallel RLC (ideal)

at

minimum,

maximum,

Current from a voltage source at

maximum,

minimum,

Magnification at

voltage:

current:

Bandwidth (rad/s)

Below

capacitive (leading)

inductive (lagging)

Above

inductive (lagging)

capacitive (leading)

Larger

lower , wider BW

higher , narrower BW

Selectivity is the ability to pass a narrow band around and reject nearby frequencies. It rises with , since .

Locus diagrams trace the tip of a phasor as one parameter varies. The impedance of a series circuit with one varying element moves along a straight line; the admittance, and so the current for a fixed voltage, is the inverse of a line that misses the origin, which is a circle through the origin. In a parallel circuit whose varying element is a branch on its own, the roles swap: the admittance, and so the current, moves along a straight line.

Standard loci (supply voltage V at angle 0°, held fixed)

  1. Series R-L, varied from to , fixed: traces a semicircle of diameter in the lagging (fourth) quadrant, from at to the origin.

  2. Series R-C, varied: the same kind of semicircle, diameter , in the leading (first) quadrant, from at to the origin.

  3. Series R-L, varied from to , fixed: semicircle of diameter , from to the origin, lagging.

  4. Series RLC, varied from to : moves up the vertical line , and traces the full circle of diameter through the origin: the leading half below , at , the lagging half above, with the half-power points at on it.

  5. R-L branch in parallel with a variable capacitor: , so the supply current moves along a vertical straight line, starting from the fixed branch current at and rising as increases. It is smallest, and in phase with , where that line crosses the real axis.

  6. On the -varied locus of a series circuit, the active power is largest at the point with the largest component in phase with , where and : maximum power transfer ( with a purely reactive ) seen geometrically.

EXAM TIP

For the practical tank, the unity-pf frequency, the frequency of maximum impedance and are three slightly different frequencies that coincide only as . A question that says 'in phase' or 'unity power factor' wants .

EXAM TIP

Increasing has opposite effects: it lowers in a series circuit but raises in an ideal parallel circuit. Remember and , with the reactance of L (or C) at .

Passive filters with R, L and C

A filter's transfer function is , with the output open-circuited unless a load is stated. The cut-off (corner, dB, half-power) frequency is where falls to of its pass-band value: the dc gain for a low-pass, the high-frequency gain for a high-pass, the peak for a band-pass. (A second-order low-pass with peaks above its dc gain; its cut-off is still measured from the dc gain.) Identify the type from the limits: as a capacitor is an open circuit and an inductor a short circuit; as the reverse.

FIRST-ORDER LOW-PASS

At : ( dB), phase . Asymptotic roll-off dB/decade above .

FIRST-ORDER HIGH-PASS

At : , phase . Asymptotic slope dB/decade below .

Second order: series RLC driven by , with , and . The element the output is taken across decides the filter type.

Output across

Type

Key values

Band-pass

centre , , BW

Low-pass

,

High-pass

,

and together

Band-stop (notch)

zero output at , stop-band width

STANDARD SECOND-ORDER FORMS

Match the denominator to read and directly: series RLC has , parallel RLC has . Damping ratio . The band-pass and band-stop bandwidth is . Asymptotic slopes: low-pass dB/decade above , high-pass dB/decade below it, band-pass dB/decade on its two skirts.

CUT-OFF OF THE SECOND-ORDER LOW-PASS

dB point relative to the dc gain. (maximally flat) gives . For the matching high-pass, .

WORKED EXAMPLE

An RC high-pass filter (series C, output across R, no load) has and . Find the cut-off frequency, and the gain magnitude and phase at twice that frequency.

Solution
  1. rad/s, so Hz.

  2. At : , (about dB).

  3. Phase ; the output leads the input.

Answer: Hz; at , and phase

EXAM TIP

Loading changes a filter. A resistor across C in an RC low-pass makes the dc gain and the cut-off . Take the Thevenin equivalent at the capacitor terminals instead of using the unloaded formula.

EXAM TIP

Identify a filter quickly: open every C and short every L to get the output, then short every C and open every L for . Output only at dc: low-pass. Only at high frequency: high-pass. Zero at both ends: band-pass. Non-zero at both ends with a null at one frequency: band-stop (notch).

PREVIOUS-YEAR QUESTIONS

34 questions from the EC, EE and IN papers

Try each question first, then open the answer. We placed each question under a topic ourselves; the exam paper does not label topics.

See these papers in full: GATE ECE 2026 · GATE ECE 2025 · GATE ECE 2023 · GATE ECE 2022 · GATE ECE 2020 · GATE ECE 2018 · GATE EE 2026 · GATE EE 2022 · GATE EE 2020 · GATE EE 2018 · GATE IN 2026 · GATE IN 2025 · GATE IN 2024 · GATE IN 2023 · GATE IN 2022 · GATE IN 2020 · GATE IN 2018

GATE 2026 EC Q.31

GATE 2026 · ECQ.31 · 1 mark · NAT

Consider the circuit shown in the Figure, where the input is in Volt.

The average power (in mW) dissipated in the load resistance of at the resonant frequency is ____. (rounded off to two decimal places)

GATE 2026 EC question 31: An ideal sinusoidal voltage source v_i(t) (circle with a sine symbol) sits in the left vertical branch.Tap to open full size
Figure from the GATE 2026 EC paper. It is part of the question.
Figure description

An ideal sinusoidal voltage source v_i(t) (circle with a sine symbol) sits in the left vertical branch. Its top terminal connects to a top rail and its bottom terminal to a bottom rail. Three more vertical branches run between the same two rails, left to right: a 1 capacitor, a 2.2 mH inductor and a 1 k Ω resistor. There are no other elements, so the source, C, L and R are all in parallel across the same two nodes. Below the circuit it reads: v_i(t) = 12 sin (ω t).

Answer and solution
GATE 2026 EC Q.31: answer and solution

GATE 2026 EC Q.39

GATE 2026 · ECQ.39 · 2 marks · MCQ

In the given circuit, and . The phasor diagram for and is also shown. Assume that the phase is at a frequency of 159.15 kHz.

Among the following options, what is the nearest integer value of ?

GATE 2026 EC question 39: Left: a voltage V is applied across two terminals, + at the top and - at the bottom.Tap to open full size
Figure from the GATE 2026 EC paper. It is part of the question.
Figure description

Left: a voltage V is applied across two terminals, + at the top and - at the bottom. Two branches are connected in parallel across these terminals. Branch 1: current I_C flows downward through resistor R_C in series with capacitor C. Branch 2: current I_L flows downward through resistor R_L in series with inductor L. Right: phasor diagram with V as the horizontal dashed reference pointing right. I_C is drawn above the reference, leading V by angle θ_1. I_L is drawn below the reference, lagging V by angle θ_2.

  1. (A)

    0

  2. (B)

    1

  3. (C)

    2

  4. (D)

    10

Answer and solution
GATE 2026 EC Q.39: answer and solution

GATE 2026 IN Q.16

GATE 2026 · INQ.16 · 1 mark · MCQ

The RLC filter shown below acts as a ________.

GATE 2026 IN question 16: Two-port RLC network.Tap to open full size
Figure from the GATE 2026 IN paper. It is part of the question.
Figure description

Two-port RLC network. The input terminals are on the left, marked V_in (+ at top, - at bottom). A resistor R runs in series along the top rail from the V_in + terminal to a junction node (marked with a dot). From that junction the top rail continues straight to the V_out + terminal on the right. A series branch of an inductor L (upper) and a capacitor C (lower) runs from the junction node down to the bottom rail. The bottom rail is a plain wire from the V_in - terminal to the V_out - terminal and joins the lower end of the capacitor at a node (marked with a dot). V_out (+ at top, - at bottom) is therefore taken across the series L-C branch, with the output terminals open (no load).

  1. (A)

    low pass filter

  2. (B)

    high pass filter

  3. (C)

    band pass filter

  4. (D)

    band stop filter

Answer and solution
GATE 2026 IN Q.16: answer and solution

GATE 2026 IN Q.33

GATE 2026 · INQ.33 · 1 mark · NAT

In a series circuit shown in the figure, the current through the resistor lags the AC source voltage by . Let and .

The frequency of the source is ____ Hz. (rounded off to the nearest integer)

GATE 2026 IN question 33: A single-loop series circuit.Tap to open full size
Figure from the GATE 2026 IN paper. It is part of the question.
Figure description

A single-loop series circuit. An AC voltage source (a circle with a sine symbol) is on the left side of the loop. A resistor labelled R is on the top wire. An inductor (a coil) labelled L is on the right side. A plain wire along the bottom closes the loop back to the source. The figure shows only the symbols R and L. Their values are given in the stem. Source, R and L are all in series, so the same current flows through all three.

Answer and solution
GATE 2026 IN Q.33: answer and solution

GATE 2025 EC Q.20

GATE 2025 · ECQ.20 · 1 mark · MCQ

Let , , and be the currents flowing through the capacitor, inductor, and resistor, respectively, in the circuit given below. The AC admittances are given in Siemens (S).

Which one of the following is TRUE?

GATE 2025 EC question 20: A voltage source 1 ∠ 90° V on the left (+ terminal at top, − at bottom) connects between a top rail and a bottom rail.Tap to open full size
Figure from the GATE 2025 EC paper. It is part of the question.
Figure description

A voltage source 1 ∠ 90° V on the left (+ terminal at top, − at bottom) connects between a top rail and a bottom rail. Three branches are connected in parallel between these rails, from left to right: (1) a capacitor labelled j0.25 S, current i_C arrowed downward (top rail to bottom rail); (2) an inductor labelled -j0.1 S, current i_L arrowed downward; (3) a resistor labelled 0.2 S, current i_R arrowed downward. Junction dots mark where the capacitor and inductor branches meet the top and bottom rails. The source and the resistor branch join at the left and right corners of the rails.

  1. (A)

  2. (B)

  3. (C)

  4. (D)

Answer and solution
GATE 2025 EC Q.20: answer and solution

GATE 2025 EC Q.39

GATE 2025 · ECQ.39 · 2 marks · MCQ

In the circuit below, is an ideal AC voltmeter and is an ideal AC ammeter. The source voltage (in Volts) is .

What should be the value of the variable capacitor such that the RMS readings on and are 25 V and 5 A, respectively?

GATE 2025 EC question 39: A sinusoidal voltage source v_s(t) (+ terminal at top, - at bottom) is connected to the left-hand input terminals of a…Tap to open full size
Figure from the GATE 2025 EC paper. It is part of the question.
Figure description

A sinusoidal voltage source v_s(t) (+ terminal at top, - at bottom) is connected to the left-hand input terminals of a two-port box labelled "Linear Time Invariant Circuit". The box's right-hand output terminals form a top node and a bottom node. The ideal AC voltmeter M_1 is connected directly between these two output nodes (+ at the top node, - at the bottom node). From the top node, the ideal AC ammeter M_2 is in series along the top wire, feeding a series branch that runs down the right side: a 5 Ω resistor, then a variable capacitor C, then a 1 H inductor, returning to the bottom node. So M_1 reads the voltage across the whole series R-C-L branch and M_2 reads the current through it.

  1. (A)

    25 μF

  2. (B)

    4 μF

  3. (C)

    0.25 μF

  4. (D)

    Insufficient information to find

Answer and solution
GATE 2025 EC Q.39: answer and solution

GATE 2025 IN Q.25

GATE 2025 · INQ.25 · 1 mark · MCQ

Three parallel admittances , , and connected in parallel with a voltage source , draw a total current from the source. The currents flowing through each of these admittances are , , and , respectively. Let . The phase relation between and is

  1. (A)

    leads by

  2. (B)

    lags by

  3. (C)

    leads by

  4. (D)

    lags by

Answer and solution
See the question in the paper
GATE 2025 IN Q.25: answer and solution

GATE 2025 IN Q.65

GATE 2025 · INQ.65 · 2 marks · NAT

For the circuit shown in the figure, the active power supplied by the source is ________ W (rounded off to one decimal place).

GATE 2025 IN question 65: A sinusoidal voltage source 100 ∠ 0° V sits on the left vertical side.Tap to open full size
Figure from the GATE 2025 IN paper. It is part of the question.
Figure description

A sinusoidal voltage source 100 ∠ 0° V sits on the left vertical side. No polarity marks are printed. From the top of the source, a series capacitor -j10 Ω and then a series resistor 10 Ω run along the top wire to node A. From node A, two branches go down to the bottom wire, which returns to the bottom of the source: (1) a middle vertical branch with a 5 Ω resistor in series with a capacitor -j5 Ω (resistor above, capacitor below); (2) a right vertical branch with an inductor j5 Ω. The two vertical branches are in parallel between node A and the bottom wire.

Answer and solution
GATE 2025 IN Q.65: answer and solution

GATE 2023 IN Q.46

GATE 2023 · INQ.46 · 2 marks · NAT

In the circuit shown, rad/s, and mH. The capacitance for which is purely real is ________ mF (rounded off to two decimal places).

GATE 2023 IN question 46: An AC voltage source V_0 cos (ω t) sits on the left vertical wire between a top rail and a bottom rail.Tap to open full size
Figure from the GATE 2023 IN paper. It is part of the question.
Figure description

An AC voltage source V_0 cos (ω t) sits on the left vertical wire between a top rail and a bottom rail. Two dots, one on the top rail and one on the bottom rail just right of the source, mark the input terminals; an arrow labelled Y_in points into the network to their right. Two branches are connected in parallel between the top and bottom rails. Branch 1 (middle): resistor R_1 in series with inductor L, with R_1 at the top and L below it. Branch 2 (right): resistor R_2 in series with a variable capacitor C (drawn with a diagonal arrow), with R_2 at the top and C below it. So the source sees (R_1 + j ω L) in parallel with (R_2 + 1/(j ω C)).

Answer and solution
GATE 2023 IN Q.46: answer and solution

GATE 2023 IN Q.65

GATE 2023 · INQ.65 · 2 marks · NAT

The voltage source Vs = V has an internal resistance of 50 . The RMS value of the current through R is ______ mA (rounded off to one decimal place).

GATE 2023 IN question 65: A single series loop.Tap to open full size
Figure from the GATE 2023 IN paper. It is part of the question.
Figure description

A single series loop. On the left is an AC voltage source labelled Vs (circle with a sine symbol). Starting from the top terminal of the source, the top wire runs right through a 25 Ω resistor and then down the right side through an inductor labelled (1/20π) mH. The bottom wire runs back left from the inductor through a capacitor labelled (1/20π) mF, then through a resistor labelled R = 25 Ω, and back to the bottom terminal of the source. So the source, 25 Ω, the (1/20π) mH inductor, the (1/20π) mF capacitor and R = 25 Ω are all in series. The source's 50 Ω internal resistance is given in the text and is not drawn.

Answer and solution
GATE 2023 IN Q.65: answer and solution

GATE 2022 EC Q.38

GATE 2022 · ECQ.38 · 2 marks · MCQ

For the circuit shown, the locus of the impedance is plotted as increases from zero to infinity. The values of and are:

GATE 2022 EC question 38: Left: a two-terminal network seen from the input, labelled Z(j ω) with an arrow pointing into it.Tap to open full size
Figure from the GATE 2022 EC paper. It is part of the question.
Figure description

Left: a two-terminal network seen from the input, labelled Z(j ω) with an arrow pointing into it. From the top input terminal, resistor R_1 runs in series to a node; between that node and the bottom input terminal (a plain wire back to the bottom terminal) are two branches in parallel: resistor R_2 and capacitor C. So Z = R_1 + (R_2 C). Right: impedance locus plot with horizontal axis Re(Z) in k Ω (ticks 0, 1, 2, 3, 4, 5) and vertical axis -Im(Z) in k Ω (ticks 0 and 1.5). The locus is a semicircle above the real axis, starting at Re(Z) = 5 k Ω (labelled ω = 0) and ending at Re(Z) = 2 k Ω (labelled ω → ∞), with its top at -Im(Z) = 1.5 k Ω; a dashed arrow labelled ω runs along the arc from the right end to the left end, showing the direction of increasing ω.

  1. (A)

  2. (B)

  3. (C)

  4. (D)

Answer and solution
GATE 2022 EC Q.38: answer and solution

GATE 2022 EC Q.39

GATE 2022 · ECQ.39 · 2 marks · MCQ

Consider the circuit shown in the figure with input in volts. The sinusoidal steady state current flowing through the circuit is shown graphically (where is in seconds). The circuit element can be ________.

GATE 2022 EC question 39: Left: a single series loop.Tap to open full size
Figure from the GATE 2022 EC paper. It is part of the question.
Figure description

Left: a single series loop. An AC voltage source labelled V(t) = sin (t) sits on the left branch, and the bottom-left node is connected to ground. From the top of the source a wire runs right through a 1 Ω resistor, then down through a box labelled Z on the right branch, then back along the bottom wire to the source. An arrow above the top wire, at its left end just before the resistor, points right and is labelled I(t), so the current flows clockwise (source top → resistor → Z → bottom). Right: a plot of I(t) against t, with an arrow labelled t pointing right. The origin t = 0 is not marked. Horizontal dotted reference lines are drawn at 1 √ 2 A, 0 A and - 1 √ 2 A. The current is a sinusoid that just touches ± 1 √ 2 A. It is drawn from just above a trough at the left edge to just before a peak at the right edge, a little over two cycles. A vertical dotted line labelled t = π /4 meets the 0 A line exactly where the current crosses zero going UPWARD: the rising zero crossing that follows the first full trough and comes before the second peak.

  1. (A)

    a capacitor of 1 F

  2. (B)

    an inductor of 1 H

  3. (C)

    a capacitor of F

  4. (D)

    an inductor of H

Answer and solution
GATE 2022 EC Q.39: answer and solution

GATE 2022 EE Q.28

GATE 2022 · EEQ.28 · 1 mark · NAT

The network shown below has a resonant frequency of 150 kHz and a bandwidth of 600 Hz. The -factor of the network is ________. (round off to nearest integer)

GATE 2022 EE question 28: A two-terminal network with input terminals at top-left and bottom-left (open circles).Tap to open full size
Figure from the GATE 2022 EE paper. It is part of the question.
Figure description

A two-terminal network with input terminals at top-left and bottom-left (open circles). The top rail runs from the top terminal to the right; the bottom rail runs from the bottom terminal to the right. Between the rails there are two parallel branches: (1) a capacitor C connected directly from the top rail to the bottom rail; (2) to its right, a series branch of an inductor L (upper) followed by a resistor R (lower), connected from the top rail to the bottom rail. So the network is C in parallel with the series combination of L and R (a practical parallel tank circuit). No numerical element values are given.

Answer and solution
GATE 2022 EE Q.28: answer and solution

GATE 2022 IN Q.33

GATE 2022 · INQ.33 · 1 mark · NAT

In the bandpass filter circuit shown, , , . The Q factor of the filter is ________ (round off to two decimal places)

GATE 2022 IN question 33: Two-port circuit, input terminals on the left, output terminals on the right.Tap to open full size
Figure from the GATE 2022 IN paper. It is part of the question.
Figure description

Two-port circuit, input terminals on the left, output terminals on the right. From the upper input terminal, an inductor L_0 and a capacitor C_0 are connected in series along the top wire, in that order from left to right. After C_0 the top wire meets a vertical resistor R_0, which runs down to the bottom wire. The bottom wire is common from the lower input terminal to the lower output terminal. The output terminals are taken directly across R_0 (upper output from the top of R_0, lower output from its bottom). Labels: 'Input' on the left, 'Output' on the right. So it is a series R-L-C loop with the output voltage across the resistor.

Answer and solution
GATE 2022 IN Q.33: answer and solution

GATE 2022 IN Q.52

GATE 2022 · INQ.52 · 2 marks · NAT

In the circuit shown, the load is driven by a sinusoidal ac voltage source at 50 Hz. Given , , and , the power factor is ________ (round off to one decimal place)

GATE 2022 IN question 52: A single-loop circuit.Tap to open full size
Figure from the GATE 2022 IN paper. It is part of the question.
Figure description

A single-loop circuit. On the left, an ac voltage source V1 (circle with sine symbol) connected between a top wire and a bottom wire. A vertical line with arrowheads at its top and bottom ends, labelled 'Load', marks the boundary just to the right of the source: everything to its right is the load. Top branch (going right from the source): R1 and C1 connected in parallel with each other (R1 drawn above, C1 below), forming one block in the top wire. Right vertical side: inductor L1, connecting the top wire down to the bottom wire. Bottom branch: resistor R2 in the bottom wire, returning to the source. So the load is (R1 || C1) in series with L1 and R2, directly across V1.

Answer and solution
GATE 2022 IN Q.52: answer and solution

GATE 2022 IN Q.60

GATE 2022 · INQ.60 · 2 marks · NAT

A 1 kHz sine-wave generator having an internal resistance of 50 Ω generates an open-circuit voltage of 10 V. When a capacitor is connected across the output terminals, the voltage drops to 8 V. The capacitance of the capacitor (in microfarads) is _______ (round off to two decimal places)

Answer and solution
See the question in the paper
GATE 2022 IN Q.60: answer and solution

GATE 2020 EC Q.16

GATE 2020 · ECQ.16 · 1 mark · NAT

The current in the RL-circuit shown below is . The value of the inductor (rounded off to two decimal places) is ______ H.

GATE 2020 EC question 16: A single series loop.Tap to open full size
Figure from the GATE 2020 EC paper. It is part of the question.
Figure description

A single series loop. On the left branch is an independent sinusoidal voltage source labelled 200 cos (5t) V, with its + terminal at the top and - terminal at the bottom. From the source's top terminal a wire runs up and along the top branch through a resistor R (value not given) to the top-right corner; the current i(t) is marked on the top branch with an arrow pointing to the right, i.e. clockwise around the loop, leaving the source's + terminal. The right branch holds an inductor L running from the top-right corner down to the bottom-right corner. The bottom wire returns to the source's - terminal.

Answer and solution
GATE 2020 EC Q.16: answer and solution

GATE 2020 EC Q.28

GATE 2020 · ECQ.28 · 2 marks · MCQ

The current I in the given network is

GATE 2020 EC question 28: Three vertical branches connected between a top rail T and a bottom rail B.Tap to open full size
Figure from the GATE 2020 EC paper. It is part of the question.
Figure description

Three vertical branches connected between a top rail T and a bottom rail B. LEFT branch: two ideal AC voltage sources in series on the left vertical wire, with a mid-node M between them. The upper source is labelled 120∠−90° V, with + at the top (at T) and − at the bottom (at M). The lower source is labelled 120∠−30° V, with − at the top (at M) and + at the bottom (at B). MIDDLE branch: two impedances in series from T to B, each labelled Z. Their junction J is joined to M by a horizontal wire carrying current I, arrow pointing right (from M to J). RIGHT branch: one impedance from T to B labelled Z = (80 − j35) Ω, which gives the value of Z used for all three impedances.

  1. (A)

    0 A.

  2. (B)

    2.38∠−96.37° A.

  3. (C)

    2.38∠143.63° A.

  4. (D)

    2.38∠−23.63° A.

Answer and solution
GATE 2020 EC Q.28: answer and solution

GATE 2020 EE Q.18

GATE 2020 · EEQ.18 · 1 mark · NAT

Currents through ammeters A2 and A3 in the figure are and , respectively. The reading of the ammeter A1 (rounded off to 3 decimal places) is ______ A.

GATE 2020 EE question 18: A single wire carries current I_1 (arrow pointing right) into ammeter A1.Tap to open full size
Figure from the GATE 2020 EE paper. It is part of the question.
Figure description

A single wire carries current I_1 (arrow pointing right) into ammeter A1. The wire leaving A1 goes to a junction node on a vertical conductor. The vertical conductor splits into two horizontal branches. The upper branch carries current I_2 (arrow pointing right) through ammeter A2 and continues to the right, open-ended. The lower branch carries current I_3 (arrow pointing right) through ammeter A3 and continues to the right, open-ended. No other elements are shown, so A1 measures the total current, which then divides between the A2 and A3 branches.

Answer and solution
GATE 2020 EE Q.18: answer and solution

GATE 2020 EE Q.46

GATE 2020 · EEQ.46 · 2 marks · NAT

A cylindrical rotor synchronous generator with constant real power output and constant terminal voltage is supplying 100 A current to a 0.9 lagging power factor load. An ideal reactor is now connected in parallel with the load, as a result of which the total lagging reactive power requirement of the load is twice the previous value while the real power remains unchanged. The armature current is now ________ A (rounded off to 2 decimal places).

Answer and solution
See the question in the paper
GATE 2020 EE Q.46: answer and solution

GATE 2020 IN Q.33

GATE 2020 · INQ.33 · 2 marks · NAT

The rms value of the phasor current in the circuit shown (in amperes) is ____

GATE 2020 IN question 33: A single-loop series circuit.Tap to open full size
Figure from the GATE 2020 IN paper. It is part of the question.
Figure description

A single-loop series circuit. Left side: an AC voltage source (circle with a sine symbol, no polarity marks) labelled √ 2 100 cos (1000t) volts. The top wire runs from the source's top terminal through a 100 Ω resistor to the top-right corner. The right side, going down, has a 100 mH inductor and then a 10 capacitor in series. The bottom wire returns from the capacitor to the source's bottom terminal and carries the current I, marked with an arrow pointing left (from the capacitor side toward the source).

Answer and solution
GATE 2020 IN Q.33: answer and solution

GATE 2018 EC Q.35

GATE 2018 · ECQ.35 · 2 marks · MCQ

For the circuit given in the figure, the voltage (in volts) across the capacitor is

GATE 2018 EC question 35: A single series loop.Tap to open full size
Figure from the GATE 2018 EC paper. It is part of the question.
Figure description

A single series loop. On the left is an AC voltage source 5 sin (5t) V, drawn with + at the top and − at the bottom. From the source's top terminal a wire runs through a 100 k Ω resistor along the top edge to the right-hand side. On the right-hand side is a 1 capacitor whose voltage V_C is marked + at its top plate and − at its bottom plate. From the capacitor's bottom plate a wire runs back through a second 100 k Ω resistor along the bottom edge to the source's bottom (−) terminal. So source, top resistor, capacitor and bottom resistor are all in series, and the source + and capacitor + are both on the top rail.

  1. (A)

  2. (B)

  3. (C)

  4. (D)

Answer and solution
GATE 2018 EC Q.35: answer and solution

GATE 2018 EE Q.8

GATE 2018 · EEQ.8 · 1 mark · MCQ

In the figure, the voltages are , and . The circuit is in sinusoidal steady state, and . , and are the average power outputs. Which one of the following statements is true?

GATE 2018 EE question 8: Three ideal voltage sources share a common bottom (ground) wire.Tap to open full size
Figure from the GATE 2018 EE paper. It is part of the question.
Figure description

Three ideal voltage sources share a common bottom (ground) wire. Left: source v_1(t), + terminal at top, with an upward arrow labelled P_1 beside it (power output). Middle: source v_2(t), + at top, upward arrow P_2. Right: source v_3(t), + at top, upward arrow P_3. Top rail: from the top of v_1 a series resistor R then an inductor L lead to the middle node, which is the top of v_2. From the middle node an inductor L then a resistor R lead to the top of v_3. So each outer source is connected to the middle source through an identical series branch R + j ω L; the bottom terminals of all three sources are joined.

  1. (A)

  2. (B)

  3. (C)

  4. (D)

Answer and solution
GATE 2018 EE Q.8: answer and solution

GATE 2018 EE Q.32

GATE 2018 · EEQ.32 · 2 marks · MCQ

The equivalent impedance for the infinite ladder circuit shown in the figure is

GATE 2018 EE question 32: An infinite ladder network between two input terminals (top-left and bottom-left dots).Tap to open full size
Figure from the GATE 2018 EE paper. It is part of the question.
Figure description

An infinite ladder network between two input terminals (top-left and bottom-left dots). An arrow labelled Z_eq looks into the terminals. The top rail has repeated series elements, each an inductor marked j9 Ω. After each series element, a shunt branch runs from the top rail down to the bottom (return) rail. Each shunt branch is an inductor marked j5 Ω in series with a capacitor marked -j1 Ω. The pattern (series j9 Ω, then shunt j5 Ω + -j1 Ω) is drawn twice and continues indefinitely to the right, shown by dashed rails and dots. The bottom rail is a plain conductor.

  1. (A)

  2. (B)

  3. (C)

  4. (D)

Answer and solution
GATE 2018 EE Q.32: answer and solution

GATE 2018 EE Q.48

GATE 2018 · EEQ.48 · 2 marks · NAT

The voltage across the circuit in the figure, and the current through it, are given by the following expressions:

where radian/s. If the average power delivered to the circuit is zero, then the value of (in Ampere) is ______ (up to 2 decimal places).

GATE 2018 EE question 48: A two-terminal box labelled "Electrical Circuit".Tap to open full size
Figure from the GATE 2018 EE paper. It is part of the question.
Figure description

A two-terminal box labelled "Electrical Circuit". The top terminal wire carries a current i(t) with the arrow pointing into the box (left to right toward the box). The voltage v(t) is marked across the two terminals with + at the top terminal and - at the bottom terminal, so v and i follow the passive sign convention (power delivered to the circuit is v · i).

Answer and solution
GATE 2018 EE Q.48: answer and solution

GATE 2018 EE Q.55

GATE 2018 · EEQ.55 · 2 marks · NAT

The voltage across the terminals and as shown in the figure, is a sinusoidal voltage having a frequency radian/s. When the inductor current is in phase with the voltage , the magnitude of the impedance (in ) seen between the terminals and is ________ (up to 2 decimal places).

GATE 2018 EE question 55: Terminals a (top, marked +) and b (bottom, marked -), with v(t) applied across them and an arrow labelled Z pointing into…Tap to open full size
Figure from the GATE 2018 EE paper. It is part of the question.
Figure description

Terminals a (top, marked +) and b (bottom, marked -), with v(t) applied across them and an arrow labelled Z pointing into the network from the a-b side. From terminal a, an inductor L is in series along the top wire, carrying current i(t) with its arrow pointing right (away from a). The right end of the inductor meets a top node. Between this top node and the bottom wire (which runs straight back to terminal b) there are two branches in parallel: a 100 µF capacitor and a 100 Ω resistor. So the circuit is L in series with (100 µF parallel with 100 Ω), seen from a-b.

Answer and solution
GATE 2018 EE Q.55: answer and solution

GATE 2018 IN Q.6

GATE 2018 · INQ.6 · 1 mark · MCQ

A series R-C circuit is excited by a sinusoidal ac voltage source. The locus diagram of the phasor current , when is varied, while keeping fixed, is

GATE 2018 IN question 6: Each option is a sketch on complex-plane axes: horizontal axis labelled x (arrows both ways), vertical axis labelled +jy…Tap to open full size
Figure from the GATE 2018 IN paper. It is part of the question.
Figure description

Each option is a sketch on complex-plane axes: horizontal axis labelled x (arrows both ways), vertical axis labelled +jy (arrows both ways). Each shows a semicircle with one end at the origin and the other end on the real axis. (A) semicircle above the positive x-axis (first quadrant), from the origin to a point on the positive x-axis. (B) semicircle below the positive x-axis (fourth quadrant), from the origin to a point on the positive x-axis. (C) semicircle above the negative x-axis (second quadrant), from a point on the negative x-axis to the origin. (D) semicircle below the negative x-axis (third quadrant), from a point on the negative x-axis to the origin.

  1. (A)

    Figure — semicircle in the first quadrant: starts at the origin, bulges upward (+jy), ends on the positive x-axis.

  2. (B)

    Figure — semicircle in the fourth quadrant: starts at the origin, bulges downward (−jy), ends on the positive x-axis.

  3. (C)

    Figure — semicircle in the second quadrant: from a point on the negative x-axis, bulges upward (+jy), ends at the origin.

  4. (D)

    Figure — semicircle in the third quadrant: from a point on the negative x-axis, bulges downward (−jy), ends at the origin.

Answer and solution
GATE 2018 IN Q.6: answer and solution

GATE 2018 IN Q.8

GATE 2018 · INQ.8 · 1 mark · NAT

A coil having an impedance of is connected in parallel to a variable capacitor as shown in figure. Keeping the excitation frequency unchanged, the value of the capacitor is changed so that parallel resonance occurs. The impedance across terminals p-q at resonance (in ) is ______.

GATE 2018 IN question 8: Two open terminals, p at the top left and q at the bottom left.Tap to open full size
Figure from the GATE 2018 IN paper. It is part of the question.
Figure description

Two open terminals, p at the top left and q at the bottom left. A horizontal wire from p runs right to a top rail; a horizontal wire from q runs right to a bottom rail. Between the rails are two parallel branches. Left branch (the coil): an inductor labelled j100 Ω at the top, in series with a resistor labelled 10 Ω below it, connected from the top rail to the bottom rail. Right branch: a variable capacitor (capacitor symbol with a diagonal arrow through it), connected from the top rail to the bottom rail. So terminals p-q see the series R-L coil (10 + j100) Ω in parallel with the variable capacitor.

Answer and solution
GATE 2018 IN Q.8: answer and solution

GATE 2018 IN Q.31

GATE 2018 · INQ.31 · 2 marks · NAT

In the figure, an RLC load is supplied by a 230 V, 50 Hz single phase source. The magnitude of the reactive power (in VAr) supplied by the source is ________.

GATE 2018 IN question 31: A 230 V, 50 Hz sinusoidal AC source sits on the left.Tap to open full size
Figure from the GATE 2018 IN paper. It is part of the question.
Figure description

A 230 V, 50 Hz sinusoidal AC source sits on the left. Two branches are connected directly across it, in parallel: (1) a middle branch with an inductor of reactance j162.6 Ω (top) in series with a resistor of 162.6 Ω (bottom); (2) a right-hand branch with a capacitor of reactance −j230 Ω. There are only two nodes, the top rail and the bottom rail, so both branches see the full 230 V.

Answer and solution
GATE 2018 IN Q.31: answer and solution

PRACTICE

6 questions to test yourself

PRACTICE 11 mark · NAT

The rms value (in V) of V is ________ (round off to two decimal places).

Answer and solution

Answer: (accepted range )

  1. The three components have different frequencies (, and rad/s), so their mean squares add.

  2. Their rms values are V, V and V.

  3. V.

PRACTICE 22 marks · MSQ

A load connected to a 250 V (rms) single-phase supply absorbs complex power kVA, where with rms phasors and the passive sign convention. Which of the following statements is/are correct?

  1. (A)

    The load power factor is 0.6 lagging.

  2. (B)

    The magnitude of the load current is 20 A.

  3. (C)

    The load impedance is .

  4. (D)

    A capacitor connected in parallel with the load and supplying 4 kvar reduces the supply current to 12 A.

Answer and solution

Answer: (A), (B), (D)

  1. kVA; pf . means the load absorbs reactive power: inductive, lagging. (A) is correct.

  2. A. (B) is correct.

  3. , inductive as expected. (C) is wrong.

  4. With the capacitor, the supply provides kVA, so A. (D) is correct.

PRACTICE 32 marks · NAT

A source network has the Thevenin equivalent V (rms) in series with at the operating frequency. A purely resistive load is connected and adjusted for maximum power transfer. The maximum power (in W) delivered to is ________ (round off to two decimal places).

Answer and solution

Answer: (accepted range )

  1. For a purely resistive load, .

  2. A.

  3. W. (A conjugate-matched load would receive W; setting gives only W.)

PRACTICE 42 marks · MCQ

A coil of resistance and inductance H is connected in parallel with a capacitor. The angular frequency at which the combination draws a current in phase with the applied sinusoidal voltage, and the input impedance of the combination at that frequency, are respectively

  1. (A)

    rad/s and

  2. (B)

    rad/s and

  3. (C)

    rad/s and

  4. (D)

    rad/s and

Answer and solution

Answer: (A)

  1. Unity pf for a lossy coil in parallel with C: rad/s.

  2. Dynamic impedance: , purely resistive.

  3. rad/s ignores the coil resistance, and is what a series circuit would present at resonance. Option (A).

PRACTICE 51 mark · MCQ

A series RLC circuit has , mH and . Its quality factor at resonance and its half-power bandwidth are

  1. (A)

    , bandwidth rad/s

  2. (B)

    , bandwidth rad/s

  3. (C)

    , bandwidth rad/s

  4. (D)

    , bandwidth rad/s

Answer and solution

Answer: (A)

  1. rad/s.

  2. .

  3. rad/s. Check: rad/s. Option (A).

PRACTICE 62 marks · MSQ

A series RLC circuit with , mH and is driven by a sinusoidal voltage , and the output is taken across the capacitor with no load. For , which of the following statements is/are correct?

  1. (A)

    The circuit is a low-pass filter.

  2. (B)

    at rad/s.

  3. (C)

    as .

  4. (D)

    At rad/s the output lags the input by .

Answer and solution

Answer: (A), (B), (D)

  1. : and as , so it is a low-pass filter. (A) is correct and (C) is wrong.

  2. rad/s and .

  3. At the terms and cancel: .

  4. So , and the angle is : the output lags the input by . (B) and (D) are correct.

OFFICIAL GATE 2027 SYLLABUS WORDING

Copied from the GATE 2027 syllabus; see all 2027 syllabi.

GATE EC

Sinusoidal steady state analysis: phasors, complex power, maximum power transfer

GATE EE

sinusoidal steady-state analysis, resonance … complex power and power factor in AC circuits

GATE IN

Peak, average and rms values of AC quantities; apparent, active and reactive powers, power factor; phasor analysis, impedance and admittance; series and parallel resonance, locus diagrams, realization of basic filters with R, L, and C elements

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