IN THE EE SYLLABUS

Power semiconductor switches and their gating

This topic covers the static V-I characteristics of the thyristor (SCR), power MOSFET and IGBT, with the power diode, TRIAC and GTO for comparison, and how each device is switched on and off by its gate. Typical problems involve latching and holding current, R and UJT triggering, gate pulse width, commutation time, di/dt and dv/dt limits, and loss and gate-charge arithmetic. Knowing which device is current-triggered or voltage-controlled, and what turns each one off, settles many conceptual questions quickly.

9 previous-year questions · 9 solved · 6 practice questions

Power diode and the thyristor: structure and static V-I characteristic

A power diode is a $p$ - $n$ junction with a lightly doped, thick drift region ( $n^{-}$ ) that lets it block high reverse voltage. It conducts when forward biased and blocks when reverse biased. When it is switched off, its stored charge must first be removed, so a reverse current flows for the reverse recovery time $t_{r r}$ before the diode regains its blocking ability.

The thyristor (SCR) is a four-layer $p$ - $n$ - $p$ - $n$ device with three junctions ( $J_{1}, J_{2}, J_{3}$ ) and three terminals: anode (A), cathode (K) and gate (G). It is a latching, current-triggered device. It can be turned on by a gate pulse but, in a conventional SCR, cannot be turned off by the gate.

Regions of the static V-I characteristic

Reverse blocking: A negative with respect to K. $J_{1}$ and $J_{3}$ are reverse biased and only a small leakage current flows, until reverse breakdown.
Forward blocking (OFF state): A positive, no gate current. $J_{2}$ is reverse biased and only a small leakage current flows.
Forward breakover: if $V_{A K}$ reaches the forward breakover voltage $V_{B O}$ , the device switches to the ON state without any gate signal. $V_{B O}$ falls as the gate current rises.
Forward conduction (ON state): the drop is small (typically about 1 to 2 V). The device stays on as long as the anode current stays above the holding current.

TWO-TRANSISTOR MODEL OF THE SCR

I_{A} = \frac{α _{2} I _{G} + I _{C B O 1} + I _{C B O 2}}{1 - ( α _{1} + α _{2} )}

The SCR is modelled as a $p$ - $n$ - $p$ transistor $Q_{1}$ (common-base current gain $α_{1}$ ) and an $n$ - $p$ - $n$ transistor $Q_{2}$ (gain $α_{2}$ ), with the gate current feeding the base of $Q_{2}$ ; $I_{C B O 1}$ and $I_{C B O 2}$ are their leakage currents. The gains rise with current. As $α_{1} + α_{2} \to 1$ the anode current is limited only by the external circuit: the device has latched.

LATCHING AND HOLDING CURRENT

I_{L} > I_{H}

Latching current $I_{L}$ is the minimum anode current that must be reached before the gate pulse is removed for the SCR to stay on. Holding current $I_{H}$ is the anode current below which a conducting SCR (gate open) turns off. Typically $I_{L}$ is about two to three times $I_{H}$ .

THYRISTOR CONDUCTION (AVERAGE) LOSS

P_{T} = V_{T 0} I_{T (a v)} + r_{T} I_{T (r m s)}^{2}

Piecewise-linear on-state model $v_{T} = V_{T 0} + r_{T} i_{T}$ : threshold voltage $V_{T 0}$ and dynamic resistance $r_{T}$ , with the average and rms values of the SCR current taken over a full period.

Turn-on methods, gate characteristics and triggering circuits

Ways to turn an SCR on

Gate current (the normal, controlled method).
Forward-voltage breakover ( $V_{A K} \geq V_{B O}$ ): not used for control, and it can damage the device.
dv/dt turn-on: a fast-rising forward voltage drives a charging current through the capacitance of the reverse-biased junction $J_{2}$ , which can trigger the device falsely.
Temperature: leakage current grows with temperature and can turn the device on.
Light (light-activated SCR).

DV/DT (FALSE) TRIGGERING CURRENT

i_{J 2} = C_{J 2} \frac{d v _{A K}}{d t}

Charging current of the junction capacitance $C_{J 2}$ of $J_{2}$ ( $C_{J 2}$ taken as constant). If this current reaches the triggering level, the SCR turns on with no gate signal; this sets the device's critical $d v / d t$ rating.

The gate characteristic is the plot of $V_{G}$ against $I_{G}$ for the gate-cathode junction; devices of one type spread between a minimum and a maximum curve. Reliable triggering needs the operating point to lie inside the preferred firing area, bounded below by the minimum gate voltage $V_{GT}$ and current $I_{GT}$ that trigger every device of the type, and above by the maximum gate voltage, current and power ( $V_{G} I_{G} \leq P_{G, ma x}$ ). The trigger source with source resistance $R_{s}$ gives a load line.

GATE LOAD LINE AND SERIES RESISTOR

V_{G} = E_{s} - I_{G} R_{s} \Rightarrow R_{s} = \frac{E _{s} - V _{G}}{I _{G}}

$E_{s}$ is the open-circuit trigger source voltage; the operating point is where this line meets the gate characteristic.

PULSE GATING: PEAK AND AVERAGE GATE POWER

P_{G, p e ak} \leq \frac{P _{G, a v (ma x)}}{f T _{p}}, f T_{p} \leq 1

For a rectangular gate pulse train of width $T_{p}$ at frequency $f$ , the average gate power is $P_{G, p e ak} f T_{p}$ . A short pulse may therefore carry a peak power above the average gate power rating $P_{G, a v (ma x)}$ , as long as it stays within the device's peak gate power limit.

The gate pulse must last long enough for the anode current to rise above $I_{L}$ . With an inductive load the anode current rises slowly, so a wide pulse or a train of pulses is needed. Isolation between the gate circuit and the power circuit is normally provided by a pulse transformer or an optocoupler.

MINIMUM GATE PULSE WIDTH WITH AN R-L LOAD

t_{p, min} = - \frac{L}{R} ln (1 - \frac{I _{L} R}{V _{s}}) \approx \frac{L I _{L}}{V _{s}}

A dc supply $V_{s}$ is switched by the SCR onto a series $R$ - $L$ load, with the current starting from zero. The current $i = \frac{V _{s}}{R} (1 - e^{- R t / L})$ must reach $I_{L}$ before the gate pulse ends. The approximation holds when $I_{L} R ≪ V_{s}$ .

R TRIGGERING (HALF-WAVE, AC SUPPLY)

α = sin^{- 1} (\frac{V _{GT} + I _{GT} R}{V _{m}})

Supply $v = V_{m} sin ω t$ ; $α$ is measured from the positive-going zero crossing of the supply. The SCR fires when the supply reaches the value that drives $I_{GT}$ through the total series gate-circuit resistance $R$ (including the minimum fixed resistor) with $V_{GT}$ across the gate junction (the series diode drop neglected). Since a sine peaks at $9 0^{\circ}$ , the range is about $0^{\circ}$ to $9 0^{\circ}$ . Increasing $R$ delays firing.

RC triggering adds a capacitor whose voltage lags the supply, so the firing angle can be delayed well beyond $9 0^{\circ}$ , approaching (but in practice short of) $18 0^{\circ}$ , by increasing $R$ or $C$ .

UJT RELAXATION OSCILLATOR

T = R C ln (\frac{1}{1 - η}), f = \frac{1}{T}

$η = R_{B 1} / (R_{B 1} + R_{B 2})$ is the intrinsic stand-off ratio. $C$ charges through $R$ from $V_{B B}$ until $v_{C}$ reaches the peak-point voltage $V_{P} = η V_{B B} + V_{D}$ ; the UJT then fires and $C$ discharges quickly through $R_{B 1}$ (or a pulse transformer), giving a gate pulse. This form neglects $V_{D}$ , the valley voltage $V_{V}$ and the discharge time.

UJT OSCILLATOR: EXACT CHARGING TIME AND THE RANGE OF R

T = R C ln (\frac{V _{B B} - V _{V}}{V _{B B} - V _{P}}), \frac{V _{B B} - V _{V}}{I _{V}} < R < \frac{V _{B B} - V _{P}}{I _{P}}

Here the capacitor discharges only down to the valley voltage $V_{V}$ , and $V_{P}$ keeps the diode drop $V_{D}$ . $I_{P}$ and $I_{V}$ are the peak-point and valley-point currents. The upper limit on $R$ lets enough current reach the emitter to fire the UJT; the lower limit lets it turn off again so that the circuit oscillates. With $V_{V} = 0$ and $V_{D} = 0$ this reduces to the simple form above.

EXAM TIP

In the simple form, the UJT oscillator frequency depends on $η$ , $R$ and $C$ only, not on $V_{B B}$ (the supply cancels in the ratio $V_{P} / V_{B B}$ when $V_{D}$ is small). To lock the gate pulses to the ac supply, $V_{B B}$ is taken from a zener-clipped rectified supply: it falls to zero at each supply zero crossing, which resets the capacitor.

Turn-off, commutation, di/dt and dv/dt protection

An SCR turns off when its anode current falls below $I_{H}$ and it is then held reverse biased long enough for the stored carriers near $J_{2}$ to recombine. The minimum such time is the device turn-off time $t_{q} = t_{r r} + t_{g r}$ (reverse recovery time plus gate recovery time). Forward voltage must not be reapplied before then: the circuit turn-off time $t_{c}$ must satisfy $t_{c} > t_{q}$ , otherwise the SCR turns on again.

Type	How the anode current is brought to zero	Where it is used
Natural (line) commutation	The ac supply voltage itself reverses	Phase-controlled rectifiers, ac voltage controllers
Forced commutation	An added circuit (charged capacitor, LC) reverse biases the SCR	DC choppers and inverters fed from dc
Load commutation	The load (a leading power factor or underdamped resonant load) brings the SCR current to zero and leaves a reverse voltage across it	Load-commutated and resonant inverters

CAPACITOR COMMUTATION TIME

t_{c} = R C ln 2 \approx 0.693 R C

A dc supply $V$ feeds a purely resistive load $R$ through the SCR. A capacitor $C$ charged to $V$ in the reverse-biasing polarity is connected directly across the conducting SCR (auxiliary switch drop neglected). The SCR turns off and $C$ recharges through $R$ , so the SCR voltage is $v = V - 2 V e^{- t / R C}$ . It passes through zero at this time, which is how long the SCR is held reverse biased.

RESONANT (SELF) COMMUTATION, SERIES R-L-C

i (t) = \frac{V _{s}}{ω _{r} L} e^{- R t /2 L} sin ω_{r} t, ω_{r} = \frac{1}{L C} - (\frac{R}{2 L})^{2}

A series $R$ - $L$ - $C$ circuit is switched onto a dc supply $V_{s}$ by the SCR, with $C$ uncharged and no initial current, and underdamped ( $R < 2 L / C$ ). The current falls to zero by itself at $t = π / ω_{r}$ and the SCR turns off. By then the capacitor has charged above $V_{s}$ , so the SCR is left reverse biased.

DI/DT LIMIT WITH SERIES INDUCTOR

L \geq \frac{V _{s}}{( d i / d t ) _{ma x}}

At the instant of turn-on the whole supply $V_{s}$ appears across the series inductor $L$ (other resistances neglected), so $d i / d t = V_{s} / L$ . Conduction starts near the gate and spreads slowly, so a small inductor in series with the SCR protects it from local hot-spot burn-out.

dv/dt protection uses an RC snubber across the SCR. The capacitor slows the rise of the forward voltage. The series resistor $R_{s}$ limits the capacitor's discharge current into the SCR at turn-on; the peak discharge current is about $V_{s} / R_{s}$ . It also damps the oscillation with any series inductance.

EXAM TIP

Do not confuse the two protections: inductor in series = di/dt, RC across the device = dv/dt.

TRIAC and GTO in brief

A TRIAC behaves like two SCRs in anti-parallel with a single gate. It conducts in both directions and can be triggered by a gate current of either polarity, so it is used for ac phase control. The four trigger modes are named by the sign of MT2 relative to MT1 and the sign of the gate current (gate relative to MT1): I+, I−, III+, III−. I+ and III− are usually the most sensitive, and III+ the least. Compared with an SCR it has lower dv/dt and di/dt ratings and a longer turn-off time, since both halves share one silicon structure, so it is used mainly at power frequency.

A GTO (gate turn-off thyristor) is latched on by a positive gate pulse like an SCR, but can also be turned off by a large negative gate current pulse. It needs no commutation circuit. Its turn-off gain $β_{o f f} = I_{A} /∣ I_{G (o f f)} ∣$ is low (typically about 3 to 5), so the turn-off gate current is a sizeable fraction of the anode current being interrupted, and its gate drive is demanding.

Device	Turn-on	Turn-off	Conducts
SCR	Gate pulse	Anode current below $I_{H}$ (commutation)	One direction
TRIAC	Gate pulse, either polarity	Current falls below $I_{H}$ at the ac zero crossing	Both directions
GTO	Positive gate pulse	Large negative gate pulse	One direction

Power MOSFET and IGBT: structure, characteristics and gate drive

The power MOSFET is a voltage-controlled, majority-carrier device. Its gate is insulated from the channel, so in the steady state it draws negligible gate current. But the gate has input capacitance that must be charged and discharged at each switching. With no minority-carrier storage it switches very fast. It has an integral body diode between source and drain (for an n-channel device, anode at the source and cathode at the drain).

Power MOSFET static characteristics

Transfer: the drain current is negligible for $V_{GS} < V_{GS (t h)}$ (cut-off) and rises with $V_{GS}$ above it.
Output ( $I_{D}$ against $V_{D S}$ for a fixed $V_{GS}$ ): an ohmic (triode) region, where the device acts as a resistance $R_{D S (o n)}$ and is used as a closed switch, and a saturation (constant-current) region. A switching device passes through the saturation region only during transitions, because the dissipation there is high.
$R_{D S (o n)}$ rises with temperature (positive temperature coefficient), which helps parallel devices share current and resists thermal runaway.
$R_{D S (o n)}$ rises steeply with the voltage rating, so MOSFETs suit lower voltages and high switching frequencies.

The IGBT combines a MOSFET input (voltage-controlled gate) with a bipolar output stage. Conductivity modulation lowers the drift region resistance, which gives a low on-state voltage drop even at high voltage ratings. Its output characteristic ( $I_{C}$ against $V_{C E}$ for fixed $V_{GE}$ ) shows almost no current until $V_{C E}$ exceeds about one junction drop. It conducts in one direction only and has no integral body diode, so an anti-parallel diode is normally added. Because of minority carriers it turns off more slowly than a MOSFET, with a current tail, which limits its switching frequency. Its four-layer structure contains a parasitic thyristor: if this latches up (excessive collector current), the gate loses control.

Property	Power MOSFET	IGBT
Control	Voltage (gate)	Voltage (gate)
Carriers	Majority only	Majority and minority
On-state drop	$I_{D} R_{D S (o n)}$ , resistive, rises with rating	Roughly a constant $V_{C E 0}$ plus a resistive part, low even at high rating
Switching speed	Fastest	Slower, current tail at turn-off
Typical use	Low voltage, high frequency	Medium to high voltage and power

GATE DRIVE POWER (MOSFET OR IGBT)

P_{G} = Q_{g} Δ V_{GS} f_{s}, I_{G, a v g} = Q_{g} f_{s}

$Q_{g}$ is the total gate charge for the gate voltage swing $Δ V_{GS}$ (from the off level to the on level; equal to $V_{GS}$ when the device is turned off at 0 V), and $f_{s}$ is the switching frequency. $P_{G}$ is the power drawn from the driver, and $I_{G, a v g}$ the average current drawn from the driver supply. With a constant gate current $I_{G}$ , the time to deliver a charge $Q$ is $t = Q / I_{G}$ .

During switching, $V_{GS}$ stays almost constant at the Miller plateau while the gate-drain charge $Q_{g d}$ is delivered and $V_{D S}$ swings. With a gate resistance $R_{G}$ , the gate current during the plateau is about $I_{G} = (V_{d r i v e} - V_{pl a t e a u}) / R_{G}$ , so the drain-voltage transition takes about $Q_{g d} / I_{G}$ .

The safe operating area (SOA) of a MOSFET or IGBT is the region of $I$ against $V$ in which the device can operate without damage. It is bounded by the maximum current, the maximum voltage and the maximum power dissipation (with a time-dependent allowance for pulses). Gate drive is typically $+ 10$ to $+ 15$ V to turn on, with zero or a negative voltage to turn off; a negative off-state voltage is common for the IGBT to improve noise immunity.

EXAM TIP

A MOSFET is voltage controlled, but it is not free of gate current while switching: the gate capacitance must be charged. Fast gate drivers matter because the switching time is set by how quickly the gate charge is delivered.

Losses, junction temperature and choosing a device

MOSFET CONDUCTION LOSS

P_{co n d} = I_{D (r m s)}^{2} R_{D S (o n)}

$I_{D (r m s)}$ is the rms drain current taken over the whole switching period, and $R_{D S (o n)}$ is taken at the operating junction temperature.

IGBT OR DIODE CONDUCTION LOSS

P_{co n d} = V_{0} I_{a v} + r I_{r m s}^{2}

Straight-line model of the on-state drop $v = V_{0} + r i$ , with the average and rms values of the device current taken over the whole period.

SWITCHING LOSS, CLAMPED INDUCTIVE SWITCHING

P_{s w} = \frac{1}{2} V I (t_{o n} + t_{o f f}) f_{s}

The device switches current $I$ against a blocked voltage $V$ with an inductive load clamped by a diode. At turn-on the current ramps linearly with the voltage held at $V$ , then the voltage falls linearly with the current held at $I$ ; turn-off is the reverse. $t_{o n}$ and $t_{o f f}$ are the total transition times. The energy per cycle is $\frac{1}{2} V I (t_{o n} + t_{o f f})$ , and multiplying by $f_{s}$ gives the power.

SWITCHING LOSS, RESISTIVE LOAD

P_{s w} = \frac{1}{6} V I (t_{o n} + t_{o f f}) f_{s}

With a resistive load the voltage and current ramp linearly at the same time, in opposite directions. The energy per transition is $\int_{0}^{t} V (1 - \frac{τ}{t}) I \frac{τ}{t} d τ = \frac{1}{6} V I t$ .

JUNCTION TEMPERATURE

T_{j} = T_{a} + P (θ_{j c} + θ_{cs} + θ_{s a})

Steady state. Thermal resistances in $^{\circ}$ C/W: junction-to-case, case-to-sink and sink-to-ambient; $P$ is the total device loss.

Need	Natural choice
Very high power, line-frequency, natural commutation	SCR
Very high power with gate turn-off	GTO
ac power control at low power	TRIAC
High frequency, low voltage	Power MOSFET
Medium to high voltage, moderate frequency	IGBT

EXAM TIP

Total loss = conduction + switching (+ gate drive and leakage losses, usually small). Switching loss grows linearly with $f_{s}$ , so conduction loss usually dominates at low frequency and switching loss at high frequency.

PREVIOUS-YEAR QUESTIONS

9 questions from the EE papers

Try each question first, then open the answer. We placed each question under a topic ourselves; the exam paper does not label topics.

See these papers in full: GATE EE 2026 · GATE EE 2024 · GATE EE 2023 · GATE EE 2022 · GATE EE 2020 · GATE EE 2018

GATE 2026 EE Q.27

GATE 2026 · EEQ.27 · 1 mark · MCQ

The figure shows a straight-line approximation for the forward characteristics of a power diode. A continuous on-state current of 15 A is flowing through the diode. What is the power loss in the diode?

GATE 2026 EE question 27: Plot with horizontal axis 'On-state voltage (V)' and vertical axis 'On-state current (A)', origin 0. — Figure from the GATE 2026 EE paper. It is part of the question.

(A)
32.8 W
(B)
21.2 W
(C)
18.6 W
(D)
23.1 W

Answer and solution

GATE 2026 EE Q.27: answer and solution

GATE 2026 EE Q.28

GATE 2026 · EEQ.28 · 1 mark · MCQ

Consider the circuit shown in Figure (a). A gate pulse $v_{g}$ is applied between time instants $t_{0}$ and $t_{1}$ . After $t_{1}$ , during the MOSFET turn OFF process, it experiences a voltage overshoot. Based on the $v_{d s}$ waveforms shown in Figure (b), which one of the following options is correct?

GATE 2026 EE question 28: Figure (a): a DC supply V_DC feeds, from its top rail, an inductor L in parallel with a series branch of a resistor R_f… — Figure from the GATE 2026 EE paper. It is part of the question.

(A)
$R_{1} > R_{2} > R_{3}$
(B)
$R_{1} > R_{3} > R_{2}$
(C)
$R_{3} > R_{2} > R_{1}$
(D)
$R_{2} > R_{3} > R_{1}$

Answer and solution

GATE 2026 EE Q.28: answer and solution

GATE 2024 EE Q.27

GATE 2024 · EEQ.27 · 1 mark · MCQ

If the following switching devices have similar power ratings, which one of them is the fastest?

(A)
SCR
(B)
GTO
(C)
IGBT
(D)
Power MOSFET

Answer and solution

GATE 2024 EE Q.27: answer and solution

See the question in the paper

Tap to open full size

GATE 2024 EE Q.27: answer and solution

GATE 2024 EE Q.35

GATE 2024 · EEQ.35 · 1 mark · NAT

A forced commutated thyristorized step-down chopper is shown in the figure. Neglect the ON-state drop across the power devices. Assume that the capacitor is initially charged to 50 V with the polarity shown in the figure. The load current (I_L) can be assumed to be constant at 10 A. Initially, Th_M is ON and Th_A is OFF. The turn-off time available to Th_M in microseconds, when Th_A is triggered, is ______ (rounded off to the nearest integer).

GATE 2024 EE question 35: A 50 V source (+ on top) feeds the top rail. — Figure from the GATE 2024 EE paper. It is part of the question.

Answer and solution

GATE 2024 EE Q.35: answer and solution

GATE 2023 EE Q.26

GATE 2023 · EEQ.26 · 1 mark · MSQ

A semiconductor switch needs to block voltage V of only one polarity (V > 0) during OFF state as shown in figure (i) and carry current in both directions during ON state as shown in figure (ii). Which of the following switch combination(s) will realize the same?

GATE 2023 EE question 26: Figure (i): a switch between terminals P (left) and Q (right), open, with voltage V marked + on the P side and - on the Q… — Figure from the GATE 2023 EE paper. It is part of the question.

(A)
Figure — IGBT (collector at P, emitter at Q) with an antiparallel diode across it, between P and Q.
(B)
Figure — IGBT with antiparallel diode, in series with an extra diode that points back towards P (conducts Q to P), between P and Q.
(C)
Figure — IGBT with antiparallel diode, in series with an extra diode that points towards Q (conducts P to Q), between P and Q.
(D)
Figure — IGBT with antiparallel diode in series with a diode conducting P to Q, the whole branch connected in parallel with a diode conducting Q to P, between P and Q.

Answer and solution

GATE 2023 EE Q.26: answer and solution

GATE 2023 EE Q.55

GATE 2023 · EEQ.55 · 2 marks · NAT

The circuit shown in the figure has reached steady state with thyristor 'T' in OFF condition. Assume that the latching and holding currents of the thyristor are zero. The thyristor is turned ON at t = 0 sec. The duration in microseconds for which the thyristor would conduct, before it turns off, is _____ (Round off to 2 decimal places).

GATE 2023 EE question 55: A 100 V DC source with its + terminal at the top. — Figure from the GATE 2023 EE paper. It is part of the question.

Answer and solution

GATE 2023 EE Q.55: answer and solution

GATE 2022 EE Q.22

GATE 2022 · EEQ.22 · 1 mark · MCQ

A charger supplies 100 W at 20 V for charging the battery of a laptop. The power devices, used in the converter inside the charger, operate at a switching frequency of 200 kHz. Which power device is best suited for this purpose?

(A)
IGBT
(B)
Thyristor
(C)
MOSFET
(D)
BJT

Answer and solution

GATE 2022 EE Q.22: answer and solution

See the question in the paper

Tap to open full size

GATE 2022 EE Q.22: answer and solution

GATE 2020 EE Q.20

GATE 2020 · EEQ.20 · 1 mark · NAT

A double pulse measurement for an inductively loaded circuit controlled by the IGBT switch is carried out to evaluate the reverse recovery characteristics of the diode, D, represented approximately as a piecewise linear plot of current vs time at diode turn-off. $L_{p a r}$ is a parasitic inductance due to the wiring of the circuit, and is in series with the diode. The point on the plot (indicate your choice by entering 1, 2, 3 or 4) at which the IGBT experiences the highest current stress is ______.

GATE 2020 EE question 20: Left: plot of diode current (vertical axis) versus time (horizontal axis). — Figure from the GATE 2020 EE paper. It is part of the question.

Answer and solution

GATE 2020 EE Q.20: answer and solution

GATE 2018 EE Q.4

GATE 2018 · EEQ.4 · 1 mark · MCQ

Four power semiconductor devices are shown in the figure along with their relevant terminals. The device(s) that can carry dc current continuously in the direction shown when gated appropriately is (are)

GATE 2018 EE question 4: Four device symbols, each with an upward arrow labelled I drawn at the bottom terminal, showing the current entering the… — Figure from the GATE 2018 EE paper. It is part of the question.

(A)
Triac only
(B)
Triac and MOSFET
(C)
Triac and GTO
(D)
Thyristor and Triac

Answer and solution

GATE 2018 EE Q.4: answer and solution

PRACTICE

6 questions to test yourself

PRACTICE 12 marks · NAT

A UJT relaxation oscillator uses $R = 10 k Ω$ , $C = 0.1 μ F$ and intrinsic stand-off ratio $η = 0.7$ . Neglecting the emitter diode drop, the valley voltage and the discharge time, the oscillation frequency in Hz is ______ (round to the nearest integer).

Answer and solution

Answer: $831$ (accepted range $\pm 3$ )

$R C = 10 \times 1 0^{3} \times 0.1 \times 1 0^{- 6} = 1 ms$ .
$T = R C ln (\frac{1}{1 - η}) = 1 ms \times ln (3.333) = 1.204 ms$ .
$f = 1/ T \approx 830.6$ Hz, so about 831 Hz.

PRACTICE 22 marks · MSQ

Which of the following statements are correct?

(A)
A power MOSFET is a voltage-controlled, majority-carrier device.
(B)
An IGBT has no current tail at turn-off because it is a voltage-controlled device.
(C)
A conventional SCR cannot be turned off through its gate once it has latched.
(D)
The on-state resistance of a power MOSFET increases with temperature.

Answer and solution

Answer: (A), (C), (D)

A is correct: the MOSFET conducts by majority carriers and is controlled by the gate voltage.
B is wrong: the IGBT has a bipolar output stage, and the stored minority carriers cause a current tail at turn-off.
C is correct: a conventional SCR is turned off only by bringing its anode current below $I_{H}$ .
D is correct: $R_{D S (o n)}$ has a positive temperature coefficient.

PRACTICE 32 marks · NAT

A power switch with a diode-clamped inductive load blocks 400 V and carries 10 A when on. At turn-on, the current rises linearly while the voltage stays at 400 V, and then the voltage falls linearly while the current stays at 10 A; turn-off is the reverse sequence. The total transition times are $t_{o n} = 60$ ns and $t_{o f f} = 40$ ns, and the switching frequency is 50 kHz. The switching loss in watts is ______.

Answer and solution

Answer: $10$ (accepted range $\pm 0.1$ )

For clamped inductive switching, each ramp contributes $\frac{1}{2} V I$ times its duration, so the energy per cycle $= \frac{1}{2} V I (t_{o n} + t_{o f f}) = 0.5 \times 400 \times 10 \times 100 \times 1 0^{- 9} = 2 \times 1 0^{- 4}$ J.
Power $=$ energy per cycle $\times f_{s} = 2 \times 1 0^{- 4} \times 50 \times 1 0^{3} = 10$ W.

PRACTICE 42 marks · NAT

An SCR connects a 100 V dc supply to a series load of $R = 20 Ω$ and $L = 0.5$ H. The latching current of the SCR is 50 mA. Taking the load current to start from zero when the gate pulse is applied, the minimum gate pulse width, in $μ$ s, is ______ (round to one decimal place).

Answer and solution

Answer: $251.3$ (accepted range $\pm 1$ )

The current is $i = \frac{V _{s}}{R} (1 - e^{- R t / L})$ and must reach $I_{L} = 0.05$ A before the pulse ends.
$\frac{I _{L} R}{V _{s}} = \frac{0.05 \times 20}{100} = 0.01$ and $\frac{L}{R} = \frac{0.5}{20} = 0.025$ s.
$t = - 0.025 ln (1 - 0.01) = 0.025 \times 0.010050 = 2.513 \times 1 0^{- 4}$ s $\approx 251.3 μ$ s.
Check: $L I_{L} / V_{s} = 0.5 \times 0.05/100 = 250 μ$ s, close because $I_{L} R ≪ V_{s}$ .

PRACTICE 51 mark · MCQ

Which one of the following statements about a conventional SCR is correct?

(A)
Holding current is always larger than latching current.
(B)
Once latched, the SCR can be turned off by applying a negative gate pulse.
(C)
Latching current is normally larger than holding current.
(D)
The forward breakover voltage increases as the gate current increases.

Answer and solution

Answer: (C)

Latching current must be reached before the gate pulse is removed for the SCR to stay on. Holding current is the level below which a conducting SCR turns off.
Hence $I_{L} > I_{H}$ normally, so C is correct and A is wrong.
A conventional SCR cannot be turned off from the gate, so B is wrong.
A larger gate current lowers the forward breakover voltage, so D is wrong.

PRACTICE 62 marks · NAT

A dc supply of 300 V feeds a thyristor through a series inductor. At the instant of turn-on the whole supply voltage appears across the inductor, and the other resistances are negligible. If the SCR can withstand a maximum $d i / d t$ of $50 A / μ s$ , the minimum inductance required, in $μ$ H, is ______.

Answer and solution

Answer: $6$ (accepted range $\pm 0.1$ )

$d i / d t = V_{s} / L$ , so $L \geq V_{s} / (d i / d t)_{ma x}$ .
$(d i / d t)_{ma x} = 50 A / μ s = 50 \times 1 0^{6} A/s$ .
$L = 300/ (50 \times 1 0^{6}) = 6 \times 1 0^{- 6}$ H $= 6 μ$ H.

OFFICIAL GATE 2027 SYLLABUS WORDING

Copied from the GATE 2027 syllabus; see all 2027 syllabi.

GATE EE

Static V-I characteristics and firing/gating circuits for Thyristor, MOSFET, IGBT

Preparing in Kolkata? IAE Academy's course for GATE EE.