Switches formulas

The SCR is modelled as a $p$-$n$-$p$ transistor $Q_1$ (common-base current gain ${\alpha }_1$) and an $n$-$p$-$n$ transistor $Q_2$ (gain ${\alpha }_2$), with the gate current feeding the base of $Q_2$; $I_{CBO1}$ and $I_{CBO2}$ are their leakage currents. The gains rise with current. As ${\alpha }_1+{\alpha }_2\to 1$ the anode current is limited only by the external circuit: the device has latched.

Latching current $I_L$ is the minimum anode current that must be reached before the gate pulse is removed for the SCR to stay on. Holding current $I_H$ is the anode current below which a conducting SCR (gate open) turns off. Typically $I_L$ is about two to three times $I_H$.

Piecewise-linear on-state model $v_T=V_{T0}+r_T{i}_T$: threshold voltage $V_{T0}$ and dynamic resistance $r_T$, with the average and rms values of the SCR current taken over a full period.

Charging current of the junction capacitance $C_{J2}$ of $J_2$ ($C_{J2}$ taken as constant). If this current reaches the triggering level, the SCR turns on with no gate signal; this sets the device's critical $dv/dt$ rating.

For a rectangular gate pulse train of width $T_p$ at frequency $f$, the average gate power is $P_{G,peak}f{T}_p$. A short pulse may therefore carry a peak power above the average gate power rating $P_{G,av(max)}$, as long as it stays within the device's peak gate power limit.

A dc supply $V_s$ is switched by the SCR onto a series $R$-$L$ load, with the current starting from zero. The current $i=\frac{V_s}{R}\left(1-e^{-Rt/L}\right)$ must reach $I_L$ before the gate pulse ends. The approximation holds when $I_{L}R\ll V_s$.

Supply $v=V_m\sin \omega t$; $\alpha$ is measured from the positive-going zero crossing of the supply. The SCR fires when the supply reaches the value that drives $I_{GT}$ through the total series gate-circuit resistance $R$ (including the minimum fixed resistor) with $V_{GT}$ across the gate junction (the series diode drop neglected). Since a sine peaks at $90^{\circ }$, the range is about $0^{\circ }$ to $90^{\circ }$. Increasing $R$ delays firing.

$\eta =R_{B1}/(R_{B1}+R_{B2})$ is the intrinsic stand-off ratio. $C$ charges through $R$ from $V_{BB}$ until $v_C$ reaches the peak-point voltage $V_P=\eta V_{BB}+V_D$; the UJT then fires and $C$ discharges quickly through $R_{B1}$ (or a pulse transformer), giving a gate pulse. This form neglects $V_D$, the valley voltage $V_V$ and the discharge time.

A dc supply $V$ feeds a purely resistive load $R$ through the SCR. A capacitor $C$ charged to $V$ in the reverse-biasing polarity is connected directly across the conducting SCR (auxiliary switch drop neglected). The SCR turns off and $C$ recharges through $R$, so the SCR voltage is $v=V-2V{e}^{-t/RC}$. It passes through zero at this time, which is how long the SCR is held reverse biased.

At the instant of turn-on the whole supply $V_s$ appears across the series inductor $L$ (other resistances neglected), so $di/dt=V_s/L$. Conduction starts near the gate and spreads slowly, so a small inductor in series with the SCR protects it from local hot-spot burn-out.

$Q_g$ is the total gate charge for the gate voltage swing $\Delta V_{GS}$ (from the off level to the on level; equal to $V_{GS}$ when the device is turned off at 0 V), and $f_s$ is the switching frequency. $P_G$ is the power drawn from the driver, and $I_{G,avg}$ the average current drawn from the driver supply. With a constant gate current $I_G$, the time to deliver a charge $Q$ is $t=Q/I_G$.

$I_{D(rms)}$ is the rms drain current taken over the whole switching period, and $R_{DS(on)}$ is taken at the operating junction temperature.

The device switches current $I$ against a blocked voltage $V$ with an inductive load clamped by a diode. At turn-on the current ramps linearly with the voltage held at $V$, then the voltage falls linearly with the current held at $I$; turn-off is the reverse. $t_{on}$ and $t_{off}$ are the total transition times. The energy per cycle is $\frac{1}{2}VI(t_{on}+t_{off})$, and multiplying by $f_s$ gives the power.

With a resistive load the voltage and current ramp linearly at the same time, in opposite directions. The energy per transition is ${\int }_0^{t}V\left(1-\frac{\tau }{t}\right)I\frac{\tau }{t}d\tau =\frac{1}{6}VIt$.

Steady state. Thermal resistances in ${}^{\circ }$C/W: junction-to-case, case-to-sink and sink-to-ambient; $P$ is the total device loss.