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GATE CSE 2022 question paper with solutions

All 65 questions of the GATE 2022 Computer Science and Information Technology paper, in order, with the official answer key from IIT Kharagpur. 16 have a full solution.

questions · 100 marks
65questions · 100 marks
with a full solution
16with a full solution
question types
32 MCQ · 15 MSQ · 18 NATquestion types

GATE CSE 2022 answer key

Official answers to every question of GATE CSE 2022
QuestionTypeMarksAnswer
Q.1MCQ1D
Q.2MCQ1C
Q.3MCQ1D
Q.4MCQ1A
Q.5MCQ1B
Q.6MCQ2B
Q.7MCQ2D
Q.8MCQ2D
Q.9MCQ2B
Q.10MCQ2D
Q.11MCQ1A
Q.12MCQ1D
Q.13MCQ1D
Q.14MCQ1A
Q.15MCQ1A
Q.16MCQ1B
Q.17MCQ1A
Q.18MCQ1B
Q.19MCQ1C
Q.20MCQ1C
Q.21MCQ1D
Q.22MCQ1C
Q.23MSQ1B, C, D
Q.24MSQ1A, B, D
Q.25MSQ1A, B
Q.26MSQ1A, D
Q.27MSQ1A, B, C
Q.28NAT1509
Q.29NAT15
Q.30NAT136
Q.31NAT18
Q.32NAT17
Q.33NAT10.85
Q.34NAT1-0.5
Q.35NAT14
Q.36MCQ2A
Q.37MCQ2D
Q.38MCQ2C
Q.39MCQ2A
Q.40MCQ2C
Q.41MCQ2B
Q.42MCQ2D
Q.43MCQ2A
Q.44MCQ2A
Q.45MCQ2D
Q.46MSQ2A, B, C
Q.47MSQ2A, B, C
Q.48MSQ2B, C, D
Q.49MSQ2A, B, C
Q.50MSQ2A, B, C
Q.51MSQ2A, B, C
Q.52MSQ2A
Q.53MSQ2A, C, D
Q.54MSQ2A, B, D
Q.55MSQ2B, D
Q.56NAT22
Q.57NAT20.5
Q.58NAT224
Q.59NAT27.07 to 7.09
Q.60NAT233
Q.61NAT21.42 to 1.45
Q.62NAT20
Q.63NAT2153
Q.64NAT20.6
Q.65NAT280

General Aptitude Q.1 to Q.10

  1. Q.1MCQ · 1 markOfficial answer: D
  2. Q.2MCQ · 1 markOfficial answer: C
  3. Q.3MCQ · 1 markOfficial answer: D
  4. Q.4MCQ · 1 markOfficial answer: A
  5. Q.5MCQ · 1 markOfficial answer: B
  6. Q.6MCQ · 2 marksOfficial answer: B
  7. Q.7MCQ · 2 marksOfficial answer: D
  8. Q.8MCQ · 2 marksOfficial answer: D
  9. Q.9MCQ · 2 marksOfficial answer: B
  10. Q.10MCQ · 2 marksOfficial answer: D

Computer Science and Information Technology Q.11 to Q.65

  1. Q.11MCQ · 1 markOfficial answer: A

    Data Structures and Algorithms › Complexity

    A polynomial of degree satisfies regardless of how many terms it has, because its growth rate is governed entirely by the leading (highest-degree) term; using this, and are both , hence equal in -order. Exponential and logarithmic functions break the other three options because squaring the argument () affects an exponent multiplicatively/exponentially differently than squaring the function's value does.

    WATCH OUT FOR

    Proving option (A) only for a monomial like and treating that as proof for "a polynomial" in general, without checking that a general polynomial (sum of several degree terms, arbitrary positive leading coefficient) still satisfies the same -equivalence — the argument needs the general dominant-term (Θ-order) property of polynomials, not just the single-term case.

    Full solution
  2. Q.12MCQ · 1 markOfficial answer: D
  3. Q.13MCQ · 1 markOfficial answer: D
  4. Q.14MCQ · 1 markOfficial answer: A
  5. Q.15MCQ · 1 markOfficial answer: A

    Data Structures and Algorithms › Linear structures

    A singly linked list can be reversed in-place using three pointers (prev, curr, next), touching each node exactly once — this gives time using only extra space, and no algorithm can do better than since every node's link must be inspected and changed at least once.

    WATCH OUT FOR

    Assuming an -space constraint forces a slower algorithm (choosing B, C, or D) because students associate space-restricted algorithms with recursion (which needs stack space) rather than the standard iterative three-pointer technique, which needs only constant extra space and still runs in linear time.

    Full solution
  6. Q.16MCQ · 1 markOfficial answer: B

    Data Structures and Algorithms › Sorting & hashing

    Linearity of expectation applies regardless of which hash function each key uses: as long as every key independently lands in a uniformly random slot (among the m slots), the expected number of keys per slot is (total keys)/(total slots) = n/m, whether one hash function or several partition the keys.

    WATCH OUT FOR

    Assuming that splitting the keys across two independent hash functions by parity somehow doubles or halves the expected load (picking (C) or (D) ), instead of applying linearity of expectation separately to each half and adding.

    Full solution
  7. Q.17MCQ · 1 markOfficial answer: A

    Computer Organization and Architecture › I/O, interrupts & DMA

    Throughput for bulk transfers is limited by how much CPU intervention is required per word/chunk moved; ranking from most to least CPU intervention: programmed/polling I/O (every word) > interrupt-driven I/O (every unit/chunk) > DMA (none — only bus cycle-stealing), so DMA gives the highest throughput.

    WATCH OUT FOR

    Confusing "interrupt-driven" with "no CPU involvement" and picking (B) — interrupt-driven I/O still requires the CPU to run an ISR for each data unit/chunk, so it does not scale to bulk transfers the way DMA does, which offloads the entire block move to a dedicated controller.

    Full solution
  8. Q.18MCQ · 1 markOfficial answer: B

    Computer Organization and Architecture › ALU & control unit

    In 2's complement addition on an -bit register, arithmetic overflow occurs only when both operands have the same sign but the result has the opposite sign. Adding operands of opposite sign can never overflow, since the true sum then always lies strictly between the two operands and hence within range.

    WATCH OUT FOR

    Confusing arithmetic overflow with a simple carry-out of the MSB. A carry-out (as in option D, 1001+1111) does not by itself indicate overflow; the correct test is whether the sign of the result contradicts the common sign of two like-signed operands.

    Full solution
  9. Q.19MCQ · 1 markOfficial answer: C
  10. Q.20MCQ · 1 markOfficial answer: C
  11. Q.21MCQ · 1 markOfficial answer: D

    Programming in C › Pointers & arrays

    A pointer variable only affects memory when it is dereferenced; assigning a new address to p does nothing by itself. The expression *(&z[0] + 1) uses pointer arithmetic directly (array-to-pointer decay plus offset) and is completely independent of whatever p currently holds — it always denotes z[1] here regardless of the intervening p = &z[1]; line.

    WATCH OUT FOR

    Assuming that because p was just set to &z[1], the very next statement *(&z[0] + 1) += 3; must be "using p" or must somehow interact with it, and then either double-adding through p or getting confused about which variable receives the += 3. In fact p is a red herring for this line: &z[0] + 1 is computed independently as the address of z[1], so the update is simply z[1] = 11 + 3 = 14.

    Full solution
  12. Q.22MCQ · 1 markOfficial answer: C
  13. Q.23MSQ · 1 markOfficial answer: B, C, D
  14. Q.24MSQ · 1 markOfficial answer: A, B, D

    Computer Organization and Architecture › Memory & cache

    In a write-back cache, only a dirty (modified) block needs an eventual write to memory, and that write happens only on eviction, not on every write hit. A write-through cache never needs a dirty bit because memory is updated immediately on every write, so its blocks are never "ahead of" memory.

    WATCH OUT FOR

    Assuming every cache, regardless of write policy, needs a dirty bit, or assuming a write hit in a write-back cache must immediately propagate to main memory the way a write-through cache does.

    Full solution
  15. Q.25MSQ · 1 markOfficial answer: A, B
  16. Q.26MSQ · 1 markOfficial answer: A, D
  17. Q.27MSQ · 1 markOfficial answer: A, B, C
  18. Q.28NAT · 1 markOfficial answer: 509

    Data Structures and Algorithms › Trees & heaps

    A complete binary tree's array shape (root at index 0, children of index at and ) determines only the SHAPE of the tree, not the BST order of values. So to find the -th largest value, walk the shape using the in-order-predecessor rule starting from the rightmost node (the maximum), completely independent of any heap-order property.

    WATCH OUT FOR

    Assuming this is a max-heap and reading off the "3rd largest" as if array position reflected value magnitude directly (e.g., picking index 1 or 2, the heap's near-root children). The array only encodes tree shape here; the values still obey the BST property, so ranking requires an in-order-predecessor walk, not a heap-order read.

    Full solution
  19. Q.29NAT · 1 markOfficial answer: 5
  20. Q.30NAT · 1 markOfficial answer: 36
  21. Q.31NAT · 1 markOfficial answer: 8
  22. Q.32NAT · 1 markOfficial answer: 7
  23. Q.33NAT · 1 markOfficial answer: 0.85

    Computer Organization and Architecture › Memory & cache

    Average Memory Access Time (AMAT) = Hit time + Miss rate × Miss penalty. To keep AMAT unchanged after a latency increase, the miss rate (equivalently, hit rate) must improve enough to offset the added hit-time cost.

    WATCH OUT FOR

    Forgetting that AMAT uses (1 − hit rate) as the miss rate, or comparing the new access latency directly to the old AMAT instead of setting up the inequality AMAT_new ≤ AMAT_old and solving for h.

    Full solution
  24. Q.34NAT · 1 markOfficial answer: -0.5
  25. Q.35NAT · 1 markOfficial answer: 4
  26. Q.36MCQ · 2 marksOfficial answer: A
  27. Q.37MCQ · 2 marksOfficial answer: D
  28. Q.38MCQ · 2 marksOfficial answer: C
  29. Q.39MCQ · 2 marksOfficial answer: A
  30. Q.40MCQ · 2 marksOfficial answer: C
  31. Q.41MCQ · 2 marksOfficial answer: B
  32. Q.42MCQ · 2 marksOfficial answer: D
  33. Q.43MCQ · 2 marksOfficial answer: A

    Programming in C › Pointers & arrays

    A 3-D array a[3][3][3] initialized from a flat, doubly-nested brace list still fills strictly in row-major order (rightmost index varies fastest, regardless of how the initializer braces group the numbers visually). With j fixed at 0, the loops print a[i][0][k] for i = 0..2, k = 0..2, which are the first three elements of each of the three outer i-blocks.

    WATCH OUT FOR

    Assuming the flat initializer list fills the array in the visually-grouped chunks shown by the braces (giving option C), or confusing which index (i, j, or k) is held fixed and which varies fastest, leading to picking (B) or (D).

    Full solution
  34. Q.44MCQ · 2 marksOfficial answer: A

    Programming in C › C basics

    Bitwise AND/OR/XOR act on the binary ASCII codes of the char operands; the result is combined arithmetically with a symbol's ASCII code, and the resulting integer is printed as a character via percent-c.

    WATCH OUT FOR

    Mismapping the resulting decimal ASCII code to the wrong letter by miscounting the offset from A, e.g. taking 75 as L instead of K.

    Full solution
  35. Q.45MCQ · 2 marksOfficial answer: D
  36. Q.46MSQ · 2 marksOfficial answer: A, B, C
  37. Q.47MSQ · 2 marksOfficial answer: A, B, C
  38. Q.48MSQ · 2 marksOfficial answer: B, C, D
  39. Q.49MSQ · 2 marksOfficial answer: A, B, C

    Data Structures and Algorithms › Graph algorithms

    When all edge weights in a simple graph are distinct, Kruskal's algorithm has no ties to break, so the MST is unique; this forces the 1st and 2nd smallest edges to always be in the MST (they can't yet close any cycle), forces at least one of the 3rd/4th smallest edges in, and makes the cut-property minimum-crossing-edge argument airtight.

    WATCH OUT FOR

    Assuming "second smallest edge is always in the MST" generalizes to "the -th smallest edge is always in the MST" for larger — it does not (that's exactly why (B) is phrased as "one or both of the 3rd and 4th smallest", not "the 3rd smallest alone"); also assuming distinct weights only give a unique MST-value rather than a unique MST itself, which would wrongly make (D) look plausible.

    Full solution
  40. Q.50MSQ · 2 marksOfficial answer: A, B, C
  41. Q.51MSQ · 2 marksOfficial answer: A, B, C

    Data Structures and Algorithms › Complexity

    The recurrence generates, block by block ( from to ), the consecutive odd numbers , giving the closed form whenever . Once this closed form is established (and proved by induction using the two recurrence cases), every option reduces to identifying which block the given falls in and substituting.

    WATCH OUT FOR

    Two common traps: (1) assuming the closed form applies uniformly without first identifying which power-of-two block the argument falls into — e.g. for option D, plugging into the wrong block's formula, or not testing a concrete value, can hide that is constant rather than ; (2) for option C, misjudging the block of (it is easy to mistake it for block instead of the correct , since sits just above ).

    Full solution
  42. Q.52MSQ · 2 marksOfficial answer: A
  43. Q.53MSQ · 2 marksOfficial answer: A, C, D
  44. Q.54MSQ · 2 marksOfficial answer: A, B, D

    Computer Organization and Architecture › Memory & cache

    In a direct-mapped cache, only the (tag, index) pair of an address matters for placement — the offset just locates the byte within a fixed-size block. Here P and S land in the same (tag, index), so they always share one cache line, while Q and R share an index but differ in tag, so they permanently thrash each other's line every time both are accessed in a period.

    WATCH OUT FOR

    Treating P and S as independent cache entries because their offsets (8 vs 34) look far apart, instead of checking that both offsets fit inside the same 64-byte block once (tag, index) match — this leads students to wrongly mark S's first access as a miss and to wrongly believe P gets evicted, when in fact P and S occupy one shared, never-touched cache line while only Q and R's shared index thrashes.

    Full solution
  45. Q.55MSQ · 2 marksOfficial answer: B, D
  46. Q.56NAT · 2 marksOfficial answer: 2
  47. Q.57NAT · 2 marksOfficial answer: 0.5
  48. Q.58NAT · 2 marksOfficial answer: 24
  49. Q.59NAT · 2 marksOfficial answer: 7.07 to 7.09
  50. Q.60NAT · 2 marksOfficial answer: 33
  51. Q.61NAT · 2 marksOfficial answer: 1.42 to 1.45

    Computer Organization and Architecture › Pipelining

    Speedup with the same clock frequency and same program reduces to a ratio of CPIs; build each CPI as (base CPI) + (branch fraction) × (expected stall cycles per branch), where the expected stall on the predictor-equipped processor is a probability-weighted average over the correct/incorrect prediction outcomes.

    WATCH OUT FOR

    Assuming the BPU also improves the misprediction penalty (e.g. treating it as 0 or as some reduced value), when the problem explicitly says a wrong prediction gets neither savings nor extra stall — i.e. it costs the same 2 cycles it always did. Another common slip is applying the 2-cycle/0.4-cycle stall to 100% of instructions instead of scaling by the 30% branch fraction, or forgetting that clock frequency being equal lets CPI ratios stand in directly for the speedup.

    Full solution
  52. Q.62NAT · 2 marksOfficial answer: 0

    Data Structures and Algorithms › Linear structures

    Only Enqueue operations on are counted. Move each element of straight into , then rotate (Dequeue from , Enqueue back onto ) until the new element reaches the head. All of the reordering happens inside , so is never enqueued into and the minimum is 0.

    WATCH OUT FOR

    Doing the reordering by rotating to bring 4, then 3, then 2 to its head. That takes Enqueues on and gives 6. The rotations can be done on instead, where they do not count. A second mistake is counting every Enqueue on both queues (10) when the question asks only about .

    Full solution
  53. Q.63NAT · 2 marksOfficial answer: 153
  54. Q.64NAT · 2 marksOfficial answer: 0.6
  55. Q.65NAT · 2 marksOfficial answer: 80