IAE Academy

GATE 2022 IN Q.46: solution and answer

GATE 2022 · INQ.46 · 2 marks · MCQ

The digital circuit shown ________

GATE 2022 IN question 46: Three positive-edge-triggered D flip-flops (clock inputs drawn with a triangle, no bubble) share one common clock line CLK.Tap to open full size
Figure from the GATE 2022 IN paper. It is part of the question.
Figure description

Three positive-edge-triggered D flip-flops (clock inputs drawn with a triangle, no bubble) share one common clock line CLK. Left to right: FF0 has input D (labelled D_0) and output Q_0; FF1 has D = Q_0 and output Q_1; FF2 has D = Q_1 and output Q_2. So the three flip-flops form a serial shift register Q_0 -> Q_1 -> Q_2. A two-input NOR gate (OR symbol with an output bubble) takes Q_1 (tapped at a junction dot between FF1 and FF2) and Q_2 (fed back from the rightmost output) as inputs; its output is wired back to D_0, the D input of the first flip-flop. There are no other inputs, no preset or clear.

  1. (A)

    is a divide-by-5 counter

  2. (B)

    is a divide-by-7 counter

  3. (C)

    is a divide-by-8 counter

  4. (D)

    does not function as a counter due to disjoint cycles of states

Answer and solution

ANSWER

(A) The circuit is a divide-by-5 counter. Its states cycle , and all three unused states lead into that cycle.

Official answer: ASource: Official answer key, GATE 2022 IN (IIT Kharagpur)

  1. Read the next-state equations off the wiring. For a D flip-flop, . The overline means complement:

  2. Write the state as , start from and apply the equations one clock at a time. From : and the other two bits shift right, which gives .

  3. (the NOR output is still ). (now , so the NOR gives ). . (, so the NOR gives ).

  4. So the main cycle is , which has distinct states.

  5. Check the three unused states to rule out a second, separate cycle: , , and . Each one reaches the main cycle within at most two clocks. The counter is therefore self-starting, there is no lock-out loop, and option (D) is ruled out.

  6. Every output (for example , which runs and then repeats) has a period of clock pulses, so its frequency is . The circuit is a divide-by-5 counter.

KEY IDEA

This is a 3-stage shift register with feedback . A plain Johnson (twisted-ring) counter uses and has states. Adding to the NOR makes go to instead of , so one state is skipped and the counter has states. To find the modulus of any feedback shift register, trace the state sequence from , then check every unused state for a separate loop.

WATCH OUT FOR

Treating the circuit as an ordinary Johnson counter (mod 6), or as a 3-bit binary counter (mod 8), without reading the second NOR input. Another mistake is to pick (D) after finding only the 5-state main cycle, without tracing the unused states , and . All three lead into the main cycle, so there is no disjoint loop.

From the GATE 2022 IN paper. Every question of this paper · Download the full paper · All 30 Sequential questions, with notes

More Sequential questions