In a given sequential circuit, initial states are and . For a clock frequency of , the frequency of signal in kHz, is ________ (rounded off to the nearest integer).
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Two positive-edge-triggered D flip-flops (clock input shown as a plain triangle with no bubble) share one clock, labelled CLK = 1 MHz. Flip-flop 1 has input D_1 and outputs Q_1 and Q_1. Flip-flop 2 has input D_2 and outputs Q_2 and Q_2. A feedback wire runs from the Q_2 output, up over the top of both flip-flops, and down into D_1, so D_1 = Q_2. A diagonal wire joins the Q_1 output (with its bubble) to D_2, so D_2 = Q_1. The Q_1 output and the Q_2 output are short stubs that connect to nothing else. This is a 2-bit twisted-ring (Johnson) counter.