GATE 2024 EC Q.51: solution and answer

GATE 2024 · ECQ.51 · 2 marks · MCQ

In the circuit shown below, the transistors $M_{1}$ and $M_{2}$ are biased in saturation. Their small signal transconductances are $g_{m 1}$ and $g_{m 2}$ respectively. Neglect body effect, channel length modulation and intrinsic device capacitances.

[Figure]

Assuming that capacitor $C_{1}$ is a short circuit for AC analysis, the exact magnitude of small signal voltage gain $\frac{v _{o u t}}{v _{in}}$ is ______.

GATE 2024 EC question 51: Two NMOS transistors. — Figure from the GATE 2024 EC paper. It is part of the question.

(A)
$g_{m 2} R_{D}$
(B)
$\frac{g _{m 2} R _{D} ( R _{B} + \frac{1}{g _{m 1}} )}{R _{B} + \frac{1}{g _{m 1}} + R _{s}}$
(C)
$\frac{g _{m 2} R _{D} ( R _{B} + \frac{1}{g _{m 1}} + R _{s} )}{R _{B} + \frac{1}{g _{m 1}}}$
(D)
$\frac{g _{m 2} R _{D} ( \frac{1}{g _{m 1}} )}{\frac{1}{g _{m 1}} + R _{s}}$

Answer and solution

ANSWER

The answer is (B): $\frac{v _{o u t}}{v _{in}} = \frac{g _{m 2} R _{D} ( R _{B} + \frac{1}{g _{m 1}} )}{R _{B} + \frac{1}{g _{m 1}} + R _{s}}$

Official answer: BSource: Official answer key, GATE 2024 EC (IISc Bengaluru)

Small-signal model: $V_{D D}$ is an AC ground. The ideal DC current source $I_{r e f}$ has infinite small-signal resistance, so it becomes an open circuit. $C_{1}$ is a short, as the question says. Body effect, channel-length modulation ( $r_{o} \to \infty$ ) and device capacitances are neglected, as stated.
Diode-connected $M_{1}$ (gate tied to drain, source grounded): here $v_{g s 1} = v_{d 1}$ , so the current into its drain is $i_{d 1} = g_{m 1} v_{g s 1} = g_{m 1} v_{d 1}$ . The resistance looking into its drain is therefore $\frac{v _{d 1}}{i _{d 1}} = \frac{1}{g _{m 1}}$ to ground. With $I_{r e f}$ open, nothing else loads this node except $R_{B}$ .
So the gate of $M_{2}$ has a path to ground through $R_{B}$ in series with $\frac{1}{g _{m 1}}$ , a total resistance of $R_{B} + \frac{1}{g _{m 1}}$ .
The MOSFET gate draws no current, so $R_{S}$ and $(R_{B} + \frac{1}{g _{m 1}})$ form a plain voltage divider. The figure labels the resistor $R_{S}$ and the options write it $R_{s}$ ; it is the same resistor. Because the source of $M_{2}$ is grounded, $v_{g s 2} = v_{g 2}$ : $v_{g s 2} = v_{in} \frac{R _{B} + \frac{1}{g _{m 1}}}{R _{B} + \frac{1}{g _{m 1}} + R _{s}}$
$M_{2}$ is a common-source stage with a grounded source and $r_{o}$ neglected, so its drain sees only $R_{D}$ to AC ground: $v_{o u t} = - g_{m 2} R_{D} v_{g s 2}$ .
Putting these together: $\frac{v _{o u t}}{v _{in}} = \frac{g _{m 2} R _{D} ( R _{B} + \frac{1}{g _{m 1}} )}{R _{B} + \frac{1}{g _{m 1}} + R _{s}}$ This is option (B).

KEY IDEA

A diode-connected MOSFET looks like a resistance of $\frac{1}{g _{m}}$ to ground, and an ideal bias current source is an open circuit in AC. So the bias network $R_{B} + \frac{1}{g _{m 1}}$ forms a voltage divider with $R_{s}$ at the gate of $M_{2}$ , and that reduced input feeds a common-source stage with gain $g_{m 2} R_{D}$ .

WATCH OUT FOR

Choosing (A) because "the gate draws no current, so the whole of $v_{in}$ reaches the gate". The gate draws nothing, but the bias path $R_{B} + \frac{1}{g _{m 1}}$ does carry AC current, so there is a divider loss across $R_{s}$ . A second mistake is choosing (D), which drops $R_{B}$ from the path to ground. A third is treating the diode-connected $M_{1}$ as an AC ground (it is $\frac{1}{g _{m 1}}$ , not zero), or treating $I_{r e f}$ as a short, which grounds the top of $R_{B}$ and gives an answer that is not among the options.

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GATE 2024 EC Q.51: solution and answer

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