GATE 2026 EE Q.25: solution and answer

GATE 2026 · EEQ.25 · 1 mark · MCQ

Refer to the four circuits shown.

[Figure: four two-element loops]

Which one of the following options for $k_{1}$ , $k_{2}$ , $k_{3}$ , and $k_{4}$ makes all of them realizable?

GATE 2026 EE question 25: Four separate circuits. — Figure from the GATE 2026 EE paper. It is part of the question.

(A)
$k_{1} = 1$ , $k_{4} = - 1/3$ , for all values of $k_{2}$ and $k_{3}$
(B)
$k_{2} = - 2$ , $k_{3} = + 1/3$ , for all values of $k_{1}$ and $k_{4}$
(C)
$k_{1} = 2$ , $k_{2} = 0.5$ , $k_{3} = - 2/3$ , $k_{4} = - 3$
(D)
$k_{1} = 2$ , $k_{2} = - 0.5$ , $k_{3} = - 2/3$ , $k_{4} = + 3$

Answer and solution

ANSWER

(A) $k_{1} = 1$ , $k_{4} = - 1/3$ , for all values of $k_{2}$ and $k_{3}$ .

Official answer: ASource: Official answer key, GATE 2026 EE (IIT Guwahati)

Circuit 1 (two voltage sources in parallel). Both sources sit between the same top and bottom wires, so KVL around the loop needs them to give the same top-to-bottom voltage. Both have $+$ at the top, so $V_{X} = V_{D}$ , i.e. $k_{1} V_{D} = V_{D}$ for every $V_{D}$ . That forces $k_{1} = 1$ .
Circuit 2 (voltage source in parallel with a current source). The voltage source fixes the voltage across the pair at $V_{D}$ , and the current source fixes the loop current at $I_{X} = 0.5 k_{2} V_{D}$ . An ideal voltage source carries whatever current flows through it, so KVL and KCL both hold for any value of $I_{X}$ . $k_{2}$ is unrestricted.
Circuit 3 (current source and voltage source in one loop). The current source fixes the loop current at $I_{D}$ . The dependent voltage source passes that current while keeping its own voltage $V_{X} = k_{3} I_{D}$ , and the current source takes up whatever terminal voltage KVL needs. Nothing conflicts, so $k_{3}$ is unrestricted.
Circuit 4 (two current sources in series). A single loop carries only one current, so both sources must agree on it. $I_{D}$ points up on the left, which drives current clockwise around the loop. $I_{X}$ points up on the right, which drives it anticlockwise. Put the other way, KCL at the top node gives $I_{D} + I_{X} = 0$ , so $I_{X} = - I_{D}$ .
Substituting $I_{X} = 3 k_{4} I_{D}$ : $3 k_{4} I_{D} = - I_{D}$ for every $I_{D}$ , so $k_{4} = - \frac{1}{3}$
So all four circuits are realizable exactly when $k_{1} = 1$ and $k_{4} = - \frac{1}{3}$ , with $k_{2}$ and $k_{3}$ free. That is option (A). Options (C) and (D) have $k_{1} = 2$ , which breaks circuit 1, and their $k_{4}$ values ( $- 3$ and $+ 3$ ) break circuit 4 as well. Option (B) claims to work for all $k_{1}$ and $k_{4}$ , but any $k_{1} \neq = 1$ breaks circuit 1 and any $k_{4} \neq = - \frac{1}{3}$ breaks circuit 4.

KEY IDEA

Ideal voltage sources in parallel must have the same voltage (KVL), and ideal current sources in series must carry the same current (KCL). A voltage source paired with a current source, in either arrangement, can never conflict, so it puts no condition on its constant. Only circuits 1 and 4 constrain anything: $k_{1} = 1$ and $3 k_{4} = - 1$ .

WATCH OUT FOR

Reading the two upward arrows in circuit 4 as "the same direction" and setting $I_{X} = I_{D}$ , which gives $k_{4} = + \frac{1}{3}$ . Around the single loop, the two upward arrows actually drive current in opposite senses, so KCL at the top node needs $I_{X} = - I_{D}$ . A second trap is thinking the voltage-source/current-source pairs (circuits 2 and 3) fix $k_{2}$ or $k_{3}$ . They don't: the voltage source takes any current, and the current source takes any voltage.

From the GATE 2026 EE paper. Every question of this paper · Download the full paper · All 25 Laws & node/mesh questions, with notes

GATE 2026 EE Q.25: solution and answer

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