GATE 2018 IN Q.16: solution and answer

GATE 2018 · INQ.16 · 1 mark · NAT

The diodes given in the circuit are ideal. At $t = 60 ms$ , $V_{pq}$ (in Volts) is ____.

GATE 2018 IN question 16: A sinusoidal source 100 sin (2 π 50t) V on the left, connected between a top rail (call it A) and a bottom rail (call it B); — Figure from the GATE 2018 IN paper. It is part of the question.

Answer and solution

ANSWER

$V_{pq} = 200 V$ at $t = 60 ms$ .

Official answer: 200Source: Official answer key, GATE 2018 IN (IIT Guwahati)

Reference and timing. Take the bottom rail B as ground, so the top rail is at $v_{A} = 100 sin (100 π t) V$ , with $V_{m} = 100 V$ and $T = 20 ms$ . Assume both capacitors start uncharged and nothing loads p or q. Then $t = 60 ms = 3 T$ , so $v_{A} (60 ms) = 100 sin 6 π = 0$ . Both capacitors have already been through the negative peak at $t = 15 ms$ .
Left branch: the diode constraints. An ideal diode can never be forward biased. The upper-left diode (anode at A, cathode at p) sits directly across the left capacitor, so $V_{p} \geq v_{A}$ . The lower-left diode (anode at ground, cathode at p) gives $V_{p} \geq 0$ .
Left branch: how the capacitor charges (a clamper). Both left diodes can only push current into p, and the only way out of p is through C to A. So C can charge only around the loop ground → lower diode → p → C → A → source, and it can never discharge. It charges while $v_{A}$ is falling to a new minimum below zero ( $10$ to $15 ms$ in the first cycle). During that time the lower diode holds $V_{p} = 0$ , so $V_{C} = V_{p} - v_{A} = - v_{A}$ . At the negative peak C has charged to $100 V$ , with p positive relative to A. It keeps that charge, because both diodes block any discharge current and p is otherwise open.
So p rides on the source (positive clamper): $V_{p} = v_{A} + 100 V$ , which swings between $0$ and $200 V$ .
Right branch: a negative peak detector. The lower-right diode (anode at q, cathode at ground) sits directly across the right capacitor, so $V_{q} \leq 0$ . The upper-right diode (anode at q, cathode at A) gives $V_{q} \leq v_{A}$ . Both right diodes can only draw current out of q, so the right capacitor can only charge with q negative. The upper-right diode conducts and pulls q down whenever $v_{A}$ falls below $V_{q}$ . At $t = 15 ms$ , q reaches $- 100 V$ . After that $v_{A} \geq - 100 V$ always, so neither diode is forward biased again, and the capacitor holds $V_{q} = - 100 V$ .
Evaluate at $t = 60 ms$ : $V_{pq} = V_{p} - V_{q} = (0 + 100) - (- 100) = 200 V$
Check. In steady state $V_{pq} (t) = 200 + 100 sin (100 π t) V$ . The source polarity is not marked, but reversing it would not change the value at $t = 60 ms$ . The source is at $0$ then, and both capacitors have already charged to $100 V$ (the negative peak would simply come at $5 ms$ instead). The value of C does not matter, because ideal diodes charge the capacitors instantly.

KEY IDEA

The left half is a positive clamper: its capacitor charges to $V_{m}$ , and node p rides on the source at $v + V_{m}$ (between $0$ and $2 V_{m}$ ). The right half is a negative peak detector: its capacitor holds q at $- V_{m}$ . So $V_{pq} = v + 2 V_{m}$ . At $t = 60 ms = 3 T$ the source is exactly zero, which leaves $V_{pq} = 2 V_{m} = 200 V$ .

WATCH OUT FOR

The usual slip is treating p as a peak detector held at a constant value. p is a clamper output that swings from $0$ to $200 V$ , so its value depends on the instant. Two common wrong answers come from evaluating at a source peak instead of at $t = 60 ms$ : $300 V$ (positive peak) and $100 V$ (negative peak). The other slip is giving q the wrong sign: taking $V_{q} = + 100 V$ gives $0 V$ , and computing $V_{q} - V_{p}$ instead of $V_{p} - V_{q}$ gives $- 200 V$ .

From the GATE 2018 IN paper. Every question of this paper · Download the full paper · All 25 Diode circuits questions, with notes

GATE 2018 IN Q.16: solution and answer

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