IAE Academy

GATE 2020 IN Q.12: solution and answer

GATE 2020 · INQ.12 · 1 mark · MCQ

The Boolean operation performed by the following circuit at the output O is ____

GATE 2020 IN question 12: A 4:1 multiplexer ('4:1 Mux') with data inputs I_0, I_1, I_2, I_3 from top to bottom, output O on the right, and select…Tap to open full size
Figure from the GATE 2020 IN paper. It is part of the question.
Figure description

A 4:1 multiplexer ('4:1 Mux') with data inputs I_0, I_1, I_2, I_3 from top to bottom, output O on the right, and select lines S_1 (labelled MSB) and S_0 (labelled LSB) at the bottom. On the left, a ground symbol (logic 0) has a vertical wire rising to a top horizontal wire. That top wire passes through two NOT gates in series and then goes into I_0. Between the ground riser and the first NOT gate, a branch drops from the top wire and runs right into I_3. The node between the first and second NOT gates (the output of the first inverter) has a branch dropping down that connects to both I_1 and I_2. So I_0 = 0, I_1 = I_2 = 0, and I_3 = 0.

  1. (A)

  2. (B)

  3. (C)

  4. (D)

Answer and solution

ANSWER

The data inputs are , so . The answer is option (A).

Official answer: ASource: Official answer key, GATE 2020 IN (IIT Delhi)

  1. Complement is written as throughout. Find each data input by following the wires from ground (logic 0). is tapped from the grounded wire before either NOT gate, so .

  2. and are both taken from the output of the first NOT gate: .

  3. comes after both NOT gates: .

  4. With as the MSB, a 4:1 MUX passes when , so its output is

  5. Substitute :

  6. This is the sum-of-products form of XOR, so . Truth-table check: gives , which is XOR. The other options fail this check: (B) gives , (C) gives and (D) gives . Answer: option (A).

KEY IDEA

A MUX with fixed data inputs is just a truth table. Input is the output for select combination (with as MSB), so once you know the four input values you can read the function straight off. Here the inputs are 0, 1, 1, 0 for select values 00, 01, 10, 11, which is XOR.

WATCH OUT FOR

Losing track of the inverter count on each wire. goes through two inverters, so it is back to 0, not 1. and come off the middle node after one inverter, so they are 1. If you treat as 1, you get and pick OR, option (C). Swapping the MSB and LSB would not change this answer, because XOR is symmetric and , but it does matter in general.

From the GATE 2020 IN paper. Every question of this paper · Download the full paper · All 12 Combinational questions, with notes

More Combinational questions