IAE Academy

ISRO CS 2025 Q.55: solution and answer

ISRO 2025 · CSQ.55 · 1 mark · MCQ

In order to get low output from the following logic circuit, the possible inputs are

ISRO CS 2025 question 55: A two-gate logic circuit.Tap to open full size
Figure from the ISRO CS 2025 paper. It is part of the question.
Figure description

A two-gate logic circuit. Inputs A and B (top two lines) feed a two-input OR-shaped gate with a small bubble on its output, i.e. a NOR gate. The NOR output goes down and to the right into the upper input of a two-input NAND gate (AND shape with an output bubble). Input C is a straight horizontal line that enters the lower input of the NAND gate. The NAND output is labelled Y.

  1. (A)

    A-1,B-1,C-0

  2. (B)

    A-1,B-1,C-1

  3. (C)

    A-0,B-0,C-1

  4. (D)

    A-0,B-0,C-0

Answer and solution

ANSWER

The output is low only for , which is option (c).

Official answer: CSource: ISRO's final answer key of 15 May 2026

  1. The first gate has an OR shape with a bubble on its output, so it is a NOR gate. Its output is .

  2. The second gate has an AND shape with a bubble on its output, so it is a NAND gate. Its inputs are and , so

  3. A NAND output is only when both of its inputs are . So needs and .

  4. needs , which happens only when and .

  5. So only for .

  6. Check each option. (a) : , so . (b) : , so . (c) : , so . (d) : , so . Only option (c) gives a low output.

KEY IDEA

A NAND gate gives only when all its inputs are . Work backwards: for , the NOR output must be (so ) and must be .

WATCH OUT FOR

Reading the first gate as a plain OR (missing the output bubble), or treating the final gate as an AND. Either error gives the wrong input condition for a low output.

From the ISRO CS 2025 paper. Every question of this paper · The full paper (PDF, ISRO) · All 6 ISRO Boolean logic questions, with notes

More ISRO Boolean logic questions