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ISRO CS 2023 Q.38: solution and answer

ISRO 2023 · CSQ.38 · 1 mark · MCQ

The logical operation of the following circuit is

ISRO CS 2023 question 38: Three NAND gates (AND shape with a bubble at the output).Tap to open full size
Figure from the ISRO CS 2023 paper. It is part of the question.
Figure description

Three NAND gates (AND shape with a bubble at the output). Input A is wired to both input pins of the first NAND gate (top left). Input B is wired to both input pins of the second NAND gate (bottom left). The output of the first NAND goes to the upper input of a third NAND gate and the output of the second NAND goes to its lower input. The third NAND gate's output is labelled Y.

  1. (A)

    XOR

  2. (B)

    NAND

  3. (C)

    AND

  4. (D)

    OR

Answer and solution

ANSWER

The circuit computes , so its logical operation is OR, option (D).

Official answer: DSource: ISRO's revised and final answer key of 16 February 2024

  1. The first gate has both inputs tied to , so its output is . It works as an inverter.

  2. The second gate has both inputs tied to , so its output is .

  3. The third gate is a NAND of these two outputs: .

  4. By De Morgan's theorem, . With and , .

  5. So , which is the OR operation. Check with the truth table: gives . gives . gives . gives .

  6. The other options fail. XOR gives 0 for , but here . NAND gives 1 for , but here . AND gives 0 for , but here .

KEY IDEA

A NAND gate with its inputs tied together is an inverter. A NAND of two inverted signals is an OR gate, by De Morgan's theorem.

WATCH OUT FOR

Reading the first two gates as plain NAND gates and ignoring that each has its two inputs tied together. That makes them inverters, not NANDs. Skipping the final De Morgan step also leaves the expression looking like AND or NAND.

From the ISRO CS 2023 paper. Every question of this paper · The full paper (PDF, ISRO) · All 6 ISRO Boolean logic questions, with notes

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