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GATE 2026 CS1 Q.14: solution and answer

GATE 2026 · CS1Q.14 · 1 mark · MCQ

Match each addressing mode in List I with a data element or an element of a data structure (in a high-level language) in List II:

| List I | List II |
|---|---|
| P. Immediate | 1. Element of an array |
| Q. Indirect | 2. Pointer |
| R. Base with index | 3. Element of a record |
| S. Base with offset/displacement | 4. Constant |

GATE 2026 CS1 question 14: A two-column matching table.Tap to open full size
Figure from the GATE 2026 CS1 paper. It is part of the question.
Figure description

A two-column matching table. List I column has four addressing modes labeled P, Q, R, S: P = Immediate, Q = Indirect, R = Base with index, S = Base with offset/displacement. List II column has four data elements labeled 1, 2, 3, 4: 1 = Element of an array, 2 = Pointer, 3 = Element of a record, 4 = Constant. The question asks to match each item in List I to the correct item in List II.

  1. (A)

    P–4, Q–3, R–1, S–2

  2. (B)

    P–4, Q–2, R–1, S–3

  3. (C)

    P–1, Q–4, R–3, S–2

  4. (D)

    P–2, Q–3, R–1, S–4

Answer and solution

ANSWER

The correct answer is (B) P–4, Q–2, R–1, S–3.

Official answer: BSource: Official answer key, GATE 2026 CS1 (IIT Guwahati)

  1. P. Immediate addressing: the operand's value is embedded directly in the instruction itself, with no memory reference needed — this is exactly how a constant/literal is used in a high-level language. So P → 4 (Constant).

  2. Q. Indirect addressing: the instruction's address field holds the address of a memory location that itself holds the operand's address (or, in single-level indirect, holds the address of the operand) — the defining property is that you dereference through a stored address to reach the data. This is exactly how a pointer variable behaves: the pointer stores an address, and you follow it to get the value. So Q → 2 (Pointer).

  3. R. Base with index addressing: effective address = base register + index register, where the index register's value is typically varied at run time (e.g., incremented in a loop). This models array access: the base register holds the array's starting address and the index register holds the element number, so varying the index steps through consecutive elements. So R → 1 (Element of an array).

  4. S. Base with offset/displacement addressing: effective address = base register + a fixed (compile-time constant) displacement encoded in the instruction. This models accessing a field at a fixed, known offset within a structure/record: the base register holds the record's starting address and the displacement is the field's fixed position within it. So S → 3 (Element of a record).

  5. Combining: P–4, Q–2, R–1, S–3, which is exactly option (B).

KEY IDEA

Each addressing mode's structural definition maps directly onto a matching high-level-language construct: immediate (value in the instruction) ↔ constant; indirect (dereference through a stored address) ↔ pointer; base+index (base + a value that varies to step through elements) ↔ array element; base+displacement (base + a fixed, compile-time offset) ↔ record/structure field.

WATCH OUT FOR

Swapping base-with-index and base-with-offset/displacement (R and S): both add a base register to something, so it's easy to conflate them. The distinguishing feature is whether that "something" varies at run time (index register → array traversal) or is a fixed constant baked into the instruction (displacement → a specific, unchanging field offset in a record).

From the GATE 2026 CS1 paper. Every question of this paper · Download the full paper · All 11 Instructions & addressing questions, with notes

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