Assuming ideal op-amps, the circuit represents a
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Two op-amps, each powered from +V_DD and -V_EE. Op-amp 1 (lower, pointing right): its non-inverting (+) input is driven by the input terminal V_in; its output is the circuit output node V_out. Op-amp 2 (upper, pointing left, so its output is on the left): its non-inverting (+) input (lower right) is wired to the V_out node; its inverting (−) input (upper right) is connected by a wire looping over the top back to its own output node on the left. That same output node of op-amp 2 is also wired down and left to the inverting (−) input of op-amp 1. The circuit has no resistors, capacitors or diodes.
- (A)
summing amplifier.
- (B)
difference amplifier.
- (C)
logarithmic amplifier.
- (D)
buffer.