GATE 2025 EC Q.29: solution and answer

Official answer: A, CSource: Official answer key, GATE 2025 EC (IIT Roorkee)

1. Ideal op-amp model. Treat the ideal op-amp as a voltage-controlled voltage source $v_o=A_d(v_{+}-v_{-})+A_{cm}\frac{v_{+}+v_{-}}{2}$ with input resistance $R_i\to \infty$, output resistance $R_o=0$, differential gain $A_d\to \infty$, common-mode gain $A_{cm}=0$ (so $\text{CMRR}=A_d/A_{cm}\to \infty$) and infinite bandwidth.

2. (A) Input resistance. $R_i\to \infty$, so the input terminals draw no current ($i_{+}=i_{-}=0$). That is why KCL at the inverting node can be written with zero input current. TRUE.

3. (B) Output resistance. An ideal voltage source has zero internal resistance, so $R_o=0$ and $v_o$ does not depend on the load. An infinite $R_o$ describes an ideal current source, not a voltage amplifier. FALSE.

4. (C) Open-loop differential gain. $A_d\to \infty$. With negative feedback and a finite $v_o$, this gives $v_{+}-v_{-}=v_o/A_d\to 0$, which is the virtual short. TRUE.

5. (D) Open-loop common-mode gain. An ideal op-amp rejects any signal common to both inputs completely, so $A_{cm}=0$ and $\text{CMRR}\to \infty$. An infinite common-mode gain would be the worst possible amplifier, not the ideal one. FALSE.

6. The true statements are (A) and (C).