GATE 2022 EE Q.25: solution and answer

GATE 2022 · EEQ.25 · 1 mark · MCQ

For the circuit shown below with ideal diodes, the output will be

GATE 2022 EE question 25: A sinusoidal source V_in (drawn as a sine-wave symbol) sits between two input terminals, with + marked on the upper… — Figure from the GATE 2022 EE paper. It is part of the question.

(A)
$V_{o u t} = V_{in}$ for $V_{in} > 0$
(B)
$V_{o u t} = V_{in}$ for $V_{in} < 0$
(C)
$V_{o u t} = - V_{in}$ for $V_{in} > 0$
(D)
$V_{o u t} = - V_{in}$ for $V_{in} < 0$

Answer and solution

ANSWER

(A): $V_{o u t} = V_{in}$ for $V_{in} > 0$ . The two diodes and $R_{1}$ are in series and both diodes conduct only in the same direction round the loop, so the circuit passes the positive half-cycle unchanged and gives $V_{o u t} = 0$ for $V_{in} < 0$ .

Official answer: ASource: Official answer key, GATE 2022 EE (IIT Kharagpur)

Trace the only current path. The source, $D_{1}$ , $R_{1}$ and $D_{2}$ form one series loop, and the output terminals are open (no load). Going round the loop, current would leave the $+$ input terminal, pass through $D_{1}$ from anode to cathode, go down through $R_{1}$ from the top output node to the bottom one, pass through $D_{2}$ from its anode (right) to its cathode (left), and return to the $-$ input terminal. Both diodes point the same way round this loop, so current can only flow in this one direction.
Case $V_{in} > 0$ . The upper input terminal is positive, so the source drives current in the direction both diodes allow. Both $D_{1}$ and $D_{2}$ are forward biased. An ideal diode that is on acts as a short circuit ( $V_{D} = 0$ ).
KVL round the loop with both diodes shorted: $V_{in} - 0 - V_{R_{1}} - 0 = 0$ , so $V_{R_{1}} = V_{in}$ . The current flows down through $R_{1}$ , from the $+$ output terminal to the $-$ one, so $V_{o u t} = + V_{in} for V_{in} > 0$
Case $V_{in} < 0$ . Now the source would have to drive current the other way round the loop, which both diodes block. An ideal diode that is off acts as an open circuit, so $I = 0$ and $V_{o u t} = I R_{1} = 0$ . Check: KVL gives $V_{D_{1}} + V_{D_{2}} = V_{in} < 0$ , so the diodes are reverse biased and no diode is forward biased. The assumption is consistent.
Result: the circuit is a half-wave rectifier: $V_{o u t} = V_{in}$ for $V_{in} > 0$ and $V_{o u t} = 0$ for $V_{in} < 0$ . Option (A) matches. Option (C) is wrong because the output for $V_{in} > 0$ is $+ V_{in}$ , not $- V_{in}$ . Options (B) and (D) are wrong because the output for $V_{in} < 0$ is zero, not $V_{in}$ or $- V_{in}$ . (B) would describe the same circuit with both diodes reversed.

KEY IDEA

$D_{1}$ , $R_{1}$ and $D_{2}$ are all in one series loop with the source, and both diodes point the same way round it. With ideal diodes the loop is either a short circuit through $R_{1}$ ( $V_{in} > 0$ , so $V_{o u t} = V_{in}$ ) or open ( $V_{in} < 0$ , so $V_{o u t} = 0$ ). It is a half-wave rectifier, and the second diode only adds another series switch in the same direction.

WATCH OUT FOR

Reading $D_{2}$ as pointing against $D_{1}$ because it is drawn facing left. Trace the loop instead: after $R_{1}$ the current enters $D_{2}$ from the right, which is its anode, so both diodes conduct in the same loop direction. A second mistake is treating the two-diode circuit as a bridge or full-wave rectifier and choosing (D). With only one closed loop, nothing can flip the polarity, so the output is zero for $V_{in} < 0$ .

From the GATE 2022 EE paper. Every question of this paper · Download the full paper · All 25 Diode circuits questions, with notes

GATE 2022 EE Q.25: solution and answer

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