GATE 2026 IN Q.23: solution and answer

Official answer: DSource: Official answer key, GATE 2026 IN (IIT Guwahati)

1. For an $n$-bit ADC with full-scale range $V_{FS}$, the step size is $\Delta =\frac{V_{FS}}{2^n}$. With rounding, the quantization error is uniformly distributed over $\left(-\frac{\Delta }{2},\frac{\Delta }{2}\right)$, so the quantization noise power is $P_q=\frac{{\Delta }^2}{12}$.

2. The SQNR is maximum when the input is a sinusoid that just fills the full-scale range. Its peak-to-peak value is $2^n\Delta$, so its amplitude is $A=\frac{2^n\Delta }{2}$ and its power is $P_s=\frac{A^2}{2}=\frac{2^{2n}{\Delta }^2}{8}$.

3. $$\text{SQNR}=\frac{P_s}{P_q}=\frac{2^{2n}{\Delta }^2/8}{{\Delta }^2/12}=\frac{3}{2}{2}^{2n}$$

4. In decibels: ${\text{SQNR}}_{\text{dB}}=10{\log }_{10}(1.5)+20n{\log }_{10}2=1.76+6.02n\text{dB}$.

5. With $n=16$: ${\text{SQNR}}_{\text{dB}}=1.76+6.02\times 16=1.76+96.33\approx 98.1\text{dB}$.

6. The closest option is $98\text{dB}$, which is option (D).