Consider three registers R1, R2, and R3 that store numbers in IEEE-754 single precision floating point format. Assume that R1 and R2 contain the values (in hexadecimal notation) 0x42200000 and 0xC1200000, respectively.
If , what is the value stored in R3?
0x40800000
0xC0800000
0x83400000
0xC8500000
ANSWER
R3 = 0xC0800000, option (B).
Official answer: BSource: Official answer key, GATE 2020 CS (IIT Delhi)
Decode R1 = 0x42200000: binary 0100 0010 0010 0000...0000. Sign = 0 (positive). Exponent bits = 10000100 = 132; unbiased exponent = 132 - 127 = 5. Mantissa (fraction) bits = 01000...0 → fraction = 0.25, so significand = 1 + 0.25 = 1.25.
R1's decimal value = 1.25 × 2^5 = 1.25 × 32 = 40.
Decode R2 = 0xC1200000: binary 1100 0001 0010 0000...0000. Sign = 1 (negative). Exponent bits = 10000010 = 130; unbiased exponent = 130 - 127 = 3. Mantissa fraction = 0.25, so significand = 1.25.
R2's decimal value = -(1.25 × 2^3) = -(1.25 × 8) = -10.
Compute R3 = R1 / R2 = 40 / (-10) = -4.
Encode -4 in IEEE-754 single precision: -4 = -1.0 × 2^2. Sign bit = 1 (negative). Exponent = 2 + 127 = 129 = binary 10000001. Since the significand is exactly 1.0, the mantissa (fraction) field is all zeros.
Assemble the 32 bits: 1 10000001 00000000000000000000000. Grouping into hex nibbles gives 1100 0000 1000 0000 0000 0000 0000 0000 = 0xC0800000.
This matches option (B).
KEY IDEA
To divide two IEEE-754 single-precision numbers, decode each into sign, exponent (unbiased), and significand, do the arithmetic in decimal, then re-encode the result back into IEEE-754 bits.
WATCH OUT FOR
Forgetting to un-bias the exponent (subtracting 127) before combining, or mis-tracking the sign bit when one operand is negative, leading to a wrong-magnitude or wrong-sign final hex encoding.
From the GATE 2020 CS paper. Every question of this paper · Download the full paper · All 5 ALU & control unit questions, with notes
