Op-amps formulas

The input difference goes to zero only when negative feedback holds the output at a finite value inside $\pm V_{sat}$.

The input goes through $R_1$ to the virtual-ground node, so the source sees only $R_1$.

The input is at $v_{+}$, with $R_1$ from $v_{-}$ to ground. The gain is never below 1. With $R_f=0$ or $R_1\to \infty$ this is the voltage follower, $v_o=v_i$, used as a buffer.

Each input sees only its own resistor because the summing node is a virtual ground, so the inputs do not interact. With all resistors equal, $v_o=-(v_1+\cdots +v_n)$.

$v_1$ goes through $R_1$ to $v_{-}$, with $R_2$ from the output to $v_{-}$; $v_2$ goes through $R_3$ to $v_{+}$, with $R_4$ from $v_{+}$ to ground. The result follows by superposition.

The common-mode input cancels only with this ratio match. The differential input resistance is $2R_1$ when $R_3=R_1$ and $R_4=R_2$; $v_2$ alone sees $R_3+R_4$.

$v_2$ drives the op-amp whose output feeds the non-inverting side of the difference stage. The gain is set by the single resistor $R_G$ without disturbing the matched $R_3$ and $R_4$. The first-stage outputs are $v_{o1}=v_1-R(v_2-v_1)/R_G$ and $v_{o2}=v_2+R(v_2-v_1)/R_G$.

$|H|=1$ at $\omega =1/(RC)$ and falls at 20 dB/decade. The phase is $+90^{\circ }$ (the output leads the input). The DC gain is infinite.

It integrates only for $f\gg f_c=1/(2\pi R_{f}C)$. Below $f_c$ it is an inverting amplifier of gain $-R_f/R$, which stops offsets and bias currents from ramping the output into saturation.

$|H|=1$ at $\omega =1/(RC)$, and the gain rises at 20 dB/decade without limit. The phase is $-90^{\circ }$ (the output lags the input).

It differentiates only for $f\ll 1/(2\pi R_{1}C)$, and the high-frequency gain is capped at $-R/R_1$. A small capacitor across $R$ is sometimes added to roll the gain off further.

For a zero-average square wave of $\pm V_m$ and period $T$, the output slopes at $\mp V_m/(RC)$ for $T/2$ each half-cycle. A practical integrator needs $R_{f}C\gg T$ for this to hold.

Reversing both diodes passes the other half-cycle: $v_o=-(R_2/R_1)v_i$ for $v_i>0$ and 0 otherwise. The op-amp output stays within about one diode drop of ground (while $D_1$ conducts) or of the output node (while $D_2$ conducts), so it never saturates and there is no saturation recovery.

For $v_i>0$: $v_A=-v_i$, so $v_o=-(v_i-2v_i)=v_i$. For $v_i<0$: $v_A=0$, so $v_o=-v_i$. Reversing both diodes gives $-|v_i|$.

It works for one input polarity only (reverse the diode for $v_i<0$). The output depends on temperature through both $V_T$ and $I_S$. With a BJT (collector at $v_{-}$, base grounded, emitter at the output), $I_S$ is the transistor's saturation current.

The diode (anode at the input) is in series with the input, and $R$ is in the feedback path.

The op-amp is ideal except for its finite gain $A$ ($R_i\to \infty$, $R_o=0$). $A\beta$ is the loop gain. As $A\to \infty$, $G\to 1/\beta =1+R_f/R_1$.

The loop gain is the same $A\beta$ with the same $\beta =R_1/(R_1+R_f)$. The virtual ground now sits at $-v_o/A$ rather than exactly 0.

This holds for both configurations; the approximation needs $A\beta \gg 1$. A higher closed-loop gain means a smaller loop gain and a larger error.

${\omega }_b$ is the open-loop 3-dB frequency. For $A_0\gg 1$, $f_t=A_0{f}_b$ is the unity-gain frequency, also called the gain-bandwidth product (GBW). For $\omega \gg {\omega }_b$, $|A|\approx {\omega }_t/\omega$.

This is the same for inverting and non-inverting amplifiers built with the same resistors: the bandwidth is $f_t$ divided by the noise gain.

An inverting amplifier of gain $-1$ has a bandwidth of $f_t/2$, not $f_t$.

Applies to a single-pole closed-loop response to a small step.

This is a large-signal limit on the output and does not depend on the closed-loop gain. A heavily slew-limited sine approaches a triangle, and a large step becomes a ramp of slope SR.

The highest frequency at which a sine at the full rated output amplitude $V_{o,\max }$ is undistorted. Above $f_M$ the amplitude must drop to $SR/(2\pi f)$.

This is the same for inverting and non-inverting amplifiers. In an integrator without $R_f$, $V_{OS}$ makes the output ramp at $V_{OS}/(RC)$, and the bias current $I_{B1}$ makes it ramp at $I_{B1}/C$.

Here both currents are taken as flowing into the input terminals.

Signal sources are replaced by their resistances (zero for an ideal source; in the inverting amplifier any source resistance is part of $R_1$). Without $R_3$ the non-inverting input sits at 0 V, so no current flows in $R_1$ and all of $I_{B1}$ flows through $R_f$. Choosing $R_3=R_1\parallel R_f$ makes the two bias currents see equal resistances, which leaves only $|V_o|=I_{OS}{R}_f$. $R_3$ does nothing about $V_{OS}$.

Applies to the bare op-amp and to a whole difference or instrumentation amplifier. For a circuit, $A_d$ and $A_{cm}$ are its gains to $v_2-v_1$ and to $(v_1+v_2)/2$.

${\omega }_c$ is the loop-gain crossover frequency. PM > 0 means the loop is stable. A small PM shows up as peaking in the frequency response and ringing in the step response.

A positive GM (in dB) means the loop is stable.

${\omega }_c$ is the true crossover frequency. ${\omega }_c={\omega }_{p2}$ gives 45°, ${\omega }_c={\omega }_{p2}/\sqrt{3}$ gives 60°, and ${\omega }_c={\omega }_{p2}/2$ gives 63.4°.

Any capacitance bridging an inverting voltage gain $-A_2$ appears at the input as $C(1+A_2)$.

Assumes $G_{m2}{R}_2\gg 1$ and $C_c{G}_{m2}{R}_2\gg C_1$.

Set only by $C_c$ and the input-stage transconductance.

The second form needs $C_1\ll C_c$ and $C_1\ll C_2$. Keeping ${\omega }_t\le {\omega }_{p2}$ in a follower requires $C_c\ge G_{m1}{C}_2/G_{m2}$.

$I$ is the tail current of the input differential pair, the most current available to charge $C_c$. For a BJT input pair ($G_{m1}=I/(2V_T)$), $SR=2V_T{\omega }_t$. For a MOSFET input pair ($G_{m1}=I/V_{ov}$), $SR=V_{ov}{\omega }_t$.