For a direct-mapped cache, 4 bits are used for the tag field and 12 bits are used to index into a cache block. The size of each cache block is one byte. Assume that there is no other information stored for each cache block.
Which ONE of the following is the CORRECT option for the sizes of the main memory and the cache memory in this system (byte addressable), respectively?
64 KB and 4 KB
128 KB and 16 KB
64 KB and 8 KB
128 KB and 6 KB
ANSWER
Main memory = 64 KB, Cache memory = 4 KB → Option (A)
Official answer: ASource: Official answer key, GATE 2025 CS2 (IIT Roorkee)
Address structure for a direct-mapped, byte-addressable cache: total address bits = tag bits + index bits + block-offset bits.
Block size = 1 byte ⇒ block-offset bits = .
Total address bits = bits.
Main memory size = .
Number of cache lines (blocks) = .
Cache memory size = (number of lines) × (block size) = (no extra tag/valid-bit storage is counted, per the question's assumption).
Main memory = 64 KB and Cache memory = 4 KB, which is option (A).
KEY IDEA
In a direct-mapped, byte-addressable cache, the memory address splits into Tag + Index + Block-offset bits. Main memory size = bytes; number of cache lines = ; cache size = (number of lines) × (block size).
WATCH OUT FOR
Forgetting that a block-offset field needs bits and wrongly adding an extra offset bit even when block size is 1 byte (offset = 0 bits), or confusing "index bits" with "number of blocks" incorrectly when computing cache size.
From the GATE 2025 CS2 paper. Every question of this paper · Download the full paper · All 22 Memory & cache questions, with notes
