A system has a Translation Lookaside Buffer (TLB) that has a reach of 1 MB. TLB reach is defined as the total amount of physical memory that can be accessed through the TLB entries. The paging system uses pages of size 4 KB. The virtual address space is 64 GB and physical address space is 1 GB. If each TLB entry stores a 4-bit process id, page number, frame number, and a 2-bit control field, then the size of the TLB (in bytes) is ___________. (answer in integer)
Note: 1K=2^10, 1M=2^20, 1G=2^30
ANSWER
The size of the TLB is 1536 bytes.
Official answer: 1536Source: Official answer key, GATE 2026 CS2 (IIT Guwahati)
Each TLB entry maps one page, so the number of entries is .
The page size is bytes, so the page offset is bits.
The virtual address space is bytes, so a virtual address has bits. The page number has bits.
The physical address space is bytes, so a physical address has bits. The frame number has bits.
Bits per TLB entry bits bytes.
TLB size bytes.
KEY IDEA
The number of TLB entries is the TLB reach divided by the page size. Each entry holds the process id, the page number, the frame number and the control bits. The page number and frame number sizes come from the address widths minus the page offset.
WATCH OUT FOR
Using the full 36-bit virtual address or the 30-bit physical address instead of subtracting the 12-bit offset. Another slip is leaving out the process id or control bits, or giving the size in bits (48 per entry) instead of bytes.
From the GATE 2026 CS2 paper. Every question of this paper · Download the full paper · All 10 Memory management questions, with notes
