GATE 2018 CS Q.23: solution and answer

GATE 2018 · CSQ.23 · 1 mark · NAT

A 32-bit wide main memory unit with a capacity of 1 GB is built using 256M × 4-bit DRAM chips. The number of rows of memory cells in the DRAM chip is $2^{14}$ . The time taken to perform one refresh operation is 50 nanoseconds. The refresh period is 2 milliseconds. The percentage (rounded to the closest integer) of the time available for performing the memory read/write operations in the main memory unit is ____________.

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Answer and solution

ANSWER

The correct answer is 59.

Official answer: 59.0 to 60.0Source: Official answer key, GATE 2018 CS (IIT Guwahati)

Chip capacity. Each DRAM chip is $256 M \times 4 -bit = 2^{28} \times 2^{2} = 2^{30}$ bits (1 Gbit) per chip.
Number of chips. Total memory capacity $= 1 GB = 2^{30} bytes = 2^{33}$ bits. Number of chips $= \frac{2 ^{33}}{2 ^{30}} = 8$ . This also matches the width requirement: a 32-bit-wide bus built from 4-bit chips needs $\frac{32}{4} = 8$ chips placed side by side to form one word.
Rows and refresh operations. The chip has $2^{14}$ rows. Because all 8 chips are driven by the same row/column address lines (they only differ in which 4 of the 32 data bits they hold), one refresh cycle refreshes the same row number in all 8 chips at once. So only $2^{14} = 16384$ distinct refresh operations are needed for the entire memory unit — not $8 \times 2^{14}$ .
Total refresh time. $16384 \times 50 ns = 819200 ns = 0.8192 ms$ .
Time left for read/write. Refresh period $= 2 ms$ , so time available for read/write $= 2 - 0.8192 = 1.1808 ms$ .
Percentage available. $\frac{1.1808}{2} \times 100 = 59.04%$ , which rounds to $59$ .

KEY IDEA

All chips in a memory bank that together form the data-bus width are driven by the same address lines and are refreshed in parallel, so the number of refresh operations equals the number of rows in ONE chip, not (rows × number of chips). Refresh time competes with read/write time inside a fixed refresh period, so the fraction of the period left for read/write is $1 - \frac{total refresh time}{refresh period}$ .

WATCH OUT FOR

Multiplying the row count by the number of chips (treating each chip as needing its own separate refresh pass), which gives $8 \times 2^{14}$ refresh operations instead of $2^{14}$ , and lands on an answer far below the key.

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GATE 2018 CS Q.23: solution and answer

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